Die Bond Pad Design for Flexible Electrical Configurations

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Solution Overview

Problem

Existing light emitting device technologies face challenges in efficiently configuring multiple light emitting elements for various electrical arrangements without requiring multiple interconnect layers, leading to inefficiencies in manufacturing and increased costs due to the need for customized substrates for different applications.

Innovation Solution

A bond pad arrangement on a wafer where at least two diagonally opposite bond pads are truncated to enable direct diagonal coupling, allowing for multiple light emitting elements to be configured in series and parallel configurations using a single interconnect layer, facilitating the same die to operate at different nominal voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple interconnect layers are used to couple light emitting devices in series, then the desired interconnection can be achieved, but the device complexity and manufacturing cost increase

Engineering Contradiction:
Improveelectrical configuration flexibilityVSAvoidinterconnect layer quantity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent utilizes the diagonal dimension on the wafer surface to enable direct coupling between light emitting devices. By arranging devices and interconnects to exploit diagonal pathways, the design achieves series and parallel configurations without requiring additional vertical interconnect layers, thus reducing device complexity while maintaining configuration flexibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interconnect layer is designed to perform multiple functions simultaneously - it can configure devices in series, parallel, or other arrangements depending on the routing pattern. This multi-functional interconnect layer eliminates the need for separate dedicated interconnect structures for different electrical configurations, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If customized substrates with multiple interconnect layers are used for different applications, then specific electrical configurations can be achieved, but manufacturing efficiency decreases and costs increase

Engineering Contradiction:
Improveapplication-specific configurationVSAvoidmanufacturing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

A single standardized substrate design with a multi-functional interconnect layer can support multiple electrical configurations (series, parallel, and variations) for different applications. This universal substrate design eliminates the need for customized substrates for each application, thereby improving manufacturing efficiency through standardization while maintaining the ability to achieve application-specific configurations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The interconnect layer incorporates dynamic routing capabilities that allow the same physical structure to serve different electrical configuration purposes. By designing flexible interconnect paths that can be selectively activated or routed differently, the system adapts to various application requirements without requiring physical customization of the substrate.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If bond pads are isolated from each other on the wafer, then each light emitting device can be independently connected, but achieving desired interconnection requires multiple interconnect layers

Engineering Contradiction:
Improveindependent device connectionVSAvoidinterconnect structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent exploits the diagonal dimension on the wafer to provide direct coupling pathways between isolated bond pads. By routing interconnects diagonally across the wafer surface, devices can be independently connected while achieving desired interconnections without requiring multiple vertical interconnect layers, thus reducing structural complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Ease of operation

If interconnect segments cross over each other on the substrate, then all bond pads can be accessed, but additional conductive segments and vias are required increasing complexity

Engineering Contradiction:
Improvebond pad accessibilityVSAvoidconductive segment quantity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

Instead of crossing interconnect segments in the planar dimension which requires additional vias and conductive segments, the patent utilizes the diagonal dimension to provide direct pathways. This diagonal routing approach enables access to all bond pads without segment crossings, eliminating the need for additional conductive segments and vias, thus reducing interconnect structure complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10490719B2Die bond pad design to enable different electrical configurations
Publication Date: 2019.11.26 LUMILEDS SINGAPORE PTE LTD
  • US10490719B2 patent drawing
  • US10490719B2 patent drawing
  • US10490719B2 patent drawing

AI summary

Light emitting die (300) comprising a plurality of light emitting elements (310A, 310B), each having a pair of bond pads (N1,P1 and N2,P2), wherein at least two diagonally opposite bond pads of adjacent light emitting elements on a die have their facing corners truncated (330) to enable a direct diagonal coupling of a complementary pair of diagonally opposite bond pads when the die is monted on a substrate on which an interconnection pattern is formed. By enabling diagonal as well as lateral coupling of the bond pads of multiple light emitting elements of a die, the multiple light emitting elements may be arranged in a variety of series and/or parallel configurations, thereby facilitating the use of the same die at different nominal operating voltages with a single interconnect layer on the substrate upon which the die is mounted.