Semiconductor Die Clip Layout With Under-Clip Wire Isolation

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Solution Overview

Problem

The reduction in size of semiconductor dies due to advancements in semiconductor technology limits the space available for soldering or sintering clips, which in turn reduces the area for top-side cooling of the package, especially when accommodating gate bond wires or current sense bond wires.

Innovation Solution

A semiconductor device design that includes a semiconductor die with contact pads on both main faces, a clip connected to one of the contact pads, and a wire disposed at least partially under the clip, with an insulation layer or insulator body to prevent electrical contact between the wire and the clip, allowing for a larger clip to be placed over the die for efficient dual-side cooling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the semiconductor die size is reduced to improve integration density, then the area available for soldering or sintering a clip is reduced, but this limits the clip size and reduces the area for top side cooling

Engineering Contradiction:
Improvearea for top side coolingVSAvoidspace on top of the die for soldering or sintering clip
Core Design Contradiction:
Area of moving objectVSArea of stationary object

Solution Approach 1:

The patent moves the bond wire from the top surface to the bottom surface of the clip, utilizing the third dimension (depth/height) to resolve the space conflict. This allows the clip to maintain a large top surface area for cooling while accommodating the wire routing through the clip's thickness, effectively adding a vertical dimension to the wire path.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bond wire is disposed partially under the clip, nesting the wire within the vertical space occupied by the clip structure. This nesting arrangement allows the wire to be contained within the clip's footprint without requiring additional top surface area, thus preserving cooling area while maintaining electrical connectivity.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Temperature

If a large clip is placed over the die for efficient dual-side cooling, then thermal management is improved, but the bond wire may form an electrical contact with the clip causing a short-circuit

Engineering Contradiction:
Improvethermal management efficiencyVSAvoidelectrical isolation between wire and clip
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

An insulator body is introduced as an intermediary element between the bond wire and the clip. This insulator prevents direct electrical contact between the wire and the conductive clip, eliminating the short-circuit risk while allowing the wire to remain positioned under the clip for thermal management purposes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The insulator body is positioned in advance at the location where the wire will pass under the clip. This preliminary placement of the insulator ensures that when the wire is subsequently positioned, electrical isolation is already in place, preventing any potential short-circuit before the device is fully assembled.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If the clip size is reduced to accommodate gate bond wire or current sense bond wire, then wire routing is simplified, but the area for top side cooling is reduced

Engineering Contradiction:
Improvewire routing simplicityVSAvoidarea for top side cooling
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

Instead of reducing the clip's top surface area to create wire routing space, the patent utilizes the vertical dimension by positioning the wire under the clip. This maintains the full top surface area for cooling while providing adequate space for wire routing through the clip's thickness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent creates a simplified model of wire routing where the wire follows the contour of the clip's bottom surface. This copying of the clip's geometry for wire placement simplifies the manufacturing process while maintaining full cooling area, as the wire naturally conforms to the available space under the clip.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12068274B2Semiconductor die being connected with a clip and a wire which is partially disposed under the clip
Publication Date: 2024.08.20 INFINEON TECHNOLOGIES AG
  • US12068274B2 patent drawing
  • US12068274B2 patent drawing
  • US12068274B2 patent drawing

AI summary

A semiconductor device includes a first carrier, a first external contact, a second external contact, and a first semiconductor die. The first semiconductor die has a first main face, a second main face opposite to the first main face, a first contact pad disposed on the first main face, a second contact pad disposed on the second main face, a third contact pad disposed on the second main face, and a vertical transistor. The first semiconductor die is disposed with the first main face on the first carrier. A clip connects the second contact pad and the second external contact. A first wire is connected with the first external contact. The first wire is disposed at least partially under the clip.