Die-to-Die Clock Distribution With Matched Strobe Phase Paths
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Solution Overview
Problem
Conventional die-to-die interfaces face challenges in maintaining a quadrature relationship between strobe and data signals at high clock speeds, leading to jitter-induced limitations in data transmission rates due to varying delays in transmitting the strobe signal.
Innovation Solution
The solution involves generating a local clock signal and a strobe signal with a phase offset, which are separately distributed and routed to ensure equal delays, eliminating the need for additional circuitry like delay lines and allowing for finer control of clock gating to reduce power consumption and maintain phase offset throughout communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single clock source is used for both local clock and strobe signals, then device complexity is reduced, but maintaining quadrature relationship becomes difficult at high clock speeds due to jitter
Solution Approach 1:
The patent segments the clock distribution into two separate paths: one for the local clock signal and another for the strobe signal. Both paths originate from a single PLL but are routed separately through dedicated connection paths, allowing independent delay control while maintaining phase relationship. This segmentation enables precise skew control without requiring multiple PLLs or complex delay adjustment circuitry.
2Reliability
If delay lines are added to maintain quadrature relationship, then phase offset is maintained, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts the delay adjustment function from traditional delay line circuitry and implements it through the inherent delay characteristics of the connection paths themselves. By routing the local clock and strobe signals through separately controllable connection paths with matched length and characteristics, the system achieves delay control without adding explicit delay line components, thereby reducing device complexity while maintaining phase offset.
3Ease of operation
If connection paths have varying lengths, then routing flexibility is improved, but skew increases causing data arrival time variations
Solution Approach 1:
The patent applies local quality by ensuring that the connection paths for the local clock signal and strobe signal have matched length and transmission characteristics specifically at critical regions. This localized matching of path characteristics ensures that signals arrive at the receiving die with consistent timing, reducing skew while allowing routing flexibility in non-critical areas. The connection paths are designed with controlled impedance and matched length to achieve precise skew control.
Data Source
AI summary
A semiconductor package includes a first die having a phase locked loop outputting a local clock signal and a strobe signal to a first transmit block of the first die. The strobe signal has a phase offset relative to the local clock signal. A second die is aligned with the first die so each of a first plurality of connection points of the first die is substantially equidistant to a corresponding connection point of a second plurality of connection points of the second die. A plurality of connection paths of a substantially same length couple a connection points of the first plurality of connection points to corresponding connection points of the second plurality of connection points. Different connection paths transmit data signals from the first die to the second die based on the local clock signal and transmit the strobe signal from the first die to the second die.