Semiconductor Die Crack Detection Using Differential Frequency Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for detecting structural defects in semiconductor dies, such as cracks and delamination, suffer from large resistance dispersion due to process variations, require long test times, and need off-chip arrangements, making it difficult to set reliable limits and measure transition times accurately.
Innovation Solution
A crack detector assembly using a conductive structure with multiple resistive segments and oscillator modules that generate oscillating signals, allowing for differential frequency and resistance measurements on-chip to detect defects by comparing frequencies and resistances among segments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistive sensor composed of a metal wire is used to detect cracks, then the sensor can detect structural defects, but the sensor resistance shows large dispersion making threshold settings unreliable
Solution Approach 1:
The patent changes the measurement parameter from absolute resistance value to frequency ratio. By measuring the ratio between a first frequency (from a first conductive path) and a second frequency (from a second conductive path), the system eliminates the need for absolute threshold settings and compensates for process variations that cause resistance dispersion.
Solution Approach 2:
The patent introduces an intermediary measurement approach using frequency ratios as a mediator between the physical crack detection and the electrical measurement. This intermediary parameter (frequency ratio) is less sensitive to process variations than absolute resistance values, thereby improving measurement precision and reliability.
2Measurement precision
If off-chip measurements are performed to detect defects, then measurement capabilities are sufficient, but test time becomes long
Solution Approach 1:
The patent merges the defect detection functionality with the semiconductor die itself by integrating conductive paths and frequency measurement circuits directly on-chip. This integration allows defect detection to be performed during standard testing operations without requiring separate off-chip measurement equipment, thereby reducing test time while maintaining measurement precision.
Solution Approach 2:
The semiconductor die performs its own self-testing by using integrated conductive paths and frequency measurement circuits to detect defects internally. The die structure itself provides the measurement capability through on-chip oscillators and frequency comparison, eliminating the need for external measurement equipment and reducing overall test time.
3Productivity
If a simple resistive line sensor is used, then test time is reduced, but measurement precision and defect detection reliability deteriorate
Solution Approach 1:
The patent segments the measurement system into multiple conductive paths (first conductive path and second conductive path) with different lengths, each contributing to frequency measurements. This segmentation allows for differential measurement that improves precision while maintaining fast testing, as the frequency ratio comparison can be performed quickly without complex external equipment.
Solution Approach 2:
The patent transitions from measuring a single resistance value (one-dimensional measurement) to comparing frequency ratios from multiple conductive paths (multi-dimensional measurement). This dimensional change enables more precise defect detection through ratio comparison, while the measurement process remains fast because it uses simple frequency counting rather than complex resistance measurement techniques.
Data Source
AI summary
An assembly for detecting a structural defect in a semiconductor die is provided. The assembly includes a defect-detection sensor and a microcontroller. The defect-detection sensor includes a plurality of resistive paths of electrical-conductive material in the semiconductor die, each of which has a first end and a second end and extends proximate a perimeter of the semiconductor die. The defect-detection sensor includes a plurality of signal-generation structures, each coupled to a respective resistive path and configured to supply a test signal to the resistive path. The microcontroller is configured to control the signal-generation structures to generate the test signals, acquire the test signals in each resistive paths, test an electrical feature of the resistive paths by performing an analysis of the test signals acquired and detect the presence of the structural defect in the semiconductor die based on a result of the analysis of the test signals acquired.


