Semiconductor Die Dicing With Dual Lines and Varied Sidewall Roughness

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Solution Overview

Problem

Current semiconductor manufacturing processes face challenges in efficiently producing semiconductor dies with high productivity and effective dicing methods that maximize the number of semiconductor dies while minimizing waste and ensuring consistent surface roughness for integration into packages.

Innovation Solution

A method involving dual dicing lines, where a blade is used for the first dicing line parallel to the semiconductor die arrays and a laser for the second dicing line intersecting them, with a tape expansion process to separate the dies, ensuring varied roughness on the second side surfaces for enhanced separation and integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single dicing process is used for all dicing lines, then the manufacturing process is simple, but the productivity and die yield are reduced

Engineering Contradiction:
Improvedie yieldVSAvoiddicing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The dicing process is segmented into two distinct operations: a first dicing operation for the first dicing line and a second dicing operation for the second dicing line. This segmentation allows each dicing line to be optimized independently, improving overall die yield and productivity while managing process complexity through structured division of operations.

Inventive Principle:
Principle #1Segmentation

2Reliability

If uniform roughness is applied to all side surfaces, then the manufacturing process is simple, but the separation and integration performance is reduced

Engineering Contradiction:
Improveseparation and integration performanceVSAvoidsurface roughness control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different surface roughness characteristics are applied to different side surfaces of the semiconductor die. Specifically, the second side surface has a greater roughness than the first side surface, with the roughness varying according to area. This local differentiation enhances separation and integration performance by optimizing the interface characteristics for specific packaging requirements.

Inventive Principle:
Principle #3Local quality

3Productivity

If conventional dicing methods are used, then the process is simple, but waste is increased and productivity is reduced

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmaterial waste
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The method performs preliminary dicing operations along the first dicing line before completing the second dicing operation. This preliminary action allows for optimized die separation and reduces material waste by enabling more efficient use of the substrate area, thereby increasing production efficiency and reducing loss of substance.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach increases productivity by maximizing the number of semiconductor dies and reducing waste, while ensuring consistent surface roughness for improved integration and performance in semiconductor packages.

Implementation Method 1

performing a second dicing operation on the second dicing line using a second process that is different from the first process

Methodology Applied
Scientific EffectLaser: Laser

Implementation Method 2

a blade is used for the first dicing line parallel to the semiconductor die arrays and a laser for the second dicing line intersecting them

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 3

with a tape expansion process to separate the dies

Methodology Applied
Scientific EffectFracture Mechanics: Fracture Mechanics

Data Source

PatentUS20240421000A1Semiconductor die, semiconductor package and substrate dicing method
Publication Date: 2024.12.19 SAMSUNG ELECTRONICS CO LTD
  • US20240421000A1 patent drawing
  • US20240421000A1 patent drawing
  • US20240421000A1 patent drawing

AI summary

A semiconductor die includes: a first surface; a second surface opposite to the first surface; and a first side surface, a second side surface, a third side surface, and a fourth side surface between the first surface and the second surface, in which the first side surface faces the third side surface, and a roughness of the second side surface varies according to area, and a roughness of at least a portion of the second side surface is greater than that of the first side surface.