Die-Down Package-on-Package Structure for Thermal Dissipation
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Solution Overview
Problem
Traditional package-on-package (PoP) structures are limited by the footprint of the bottom package, which restricts the size and number of solder balls on the top package, leading to clearance and alignment issues, and often require larger top package footprints to accommodate the bottom package's die and encapsulant.
Innovation Solution
A die-down flipped PoP structure where the bottom package has a substantially flat surface allowing multiple rows of solder balls for attachment, enabling flexible design and increased flexibility in top package configuration, and incorporating thermal dissipation paths through materials like thermal interface materials and through-silicon vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a traditional PoP arrangement is used with a bottom package containing a die and encapsulant, then the structure is simple to manufacture, but the footprint of the bottom package limits the size and number of solder balls on the top package
Solution Approach 1:
The patent transitions from a conventional side-by-side or limited stacking arrangement to a vertical three-dimensional package-on-package structure. The top package is positioned directly above the bottom package in the vertical dimension, allowing multiple rows of solder balls (e.g., four rows) to be arranged around the periphery of the top package without being constrained by the horizontal footprint of the bottom package. This vertical stacking enables increased pincount and solder ball quantity while maintaining manufacturing simplicity.
2Quantity of substance
If the top package footprint is increased to avoid the bottom package die, then more solder balls can be accommodated, but the overall package size increases
Solution Approach 1:
The invention resolves this contradiction by moving the packaging arrangement into the vertical dimension. Instead of expanding the top package footprint horizontally to accommodate more solder balls, the top package is stacked vertically above the bottom package. This allows the top package to maintain a compact footprint while still accommodating multiple rows of solder balls (e.g., four rows around the periphery) by utilizing the vertical space and the side walls of the bottom package enclosure for clearance.
Solution Approach 2:
The patent employs a nested arrangement where the top package is positioned within the vertical space above the bottom package. The top package footprint is smaller than the bottom package footprint, allowing the top package to be effectively 'nested' in the vertical dimension. This nesting approach enables the top package to accommodate multiple solder ball rows without increasing the overall package footprint, as the top package fits within the horizontal boundaries defined by the bottom package.
3Reliability
If only two rows of solder balls are used around the periphery of the top package, then clearance issues with the bottom package die are avoided, but the pincount is limited
Solution Approach 1:
The patent resolves this contradiction by utilizing the vertical dimension and the side walls of the bottom package enclosure. Instead of being limited to two rows of solder balls constrained by the horizontal clearance from the bottom package die, the top package can accommodate multiple rows (e.g., four rows) around its periphery. The vertical stacking arrangement provides sufficient clearance from the bottom package die, while the side walls of the bottom package enclosure provide reference surfaces for alignment, enabling increased pincount without compromising clearance and alignment reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for more flexible packaging designs, improved thermal dissipation, and increased pincount, addressing the limitations of traditional PoP structures by enabling multiple rows of solder balls and enhanced thermal management.
Implementation Method 1
incorporating thermal dissipation paths through materials like thermal interface materials and through-silicon vias
Data Source
AI summary
Embodiments of the present disclosure provide a package on package arrangement comprising a bottom package and a second package. The first package includes a substrate layer including (i) a top side and (ii) a bottom side that is opposite to the top side. Further, the top side defines a substantially flat surface. The first package also includes a die coupled to the bottom side of the substrate layer. The second package includes a plurality of rows of solder balls, and the second package is attached to the substantially flat surface of the substrate layer via the plurality of rows of solder balls.


