Die Edge Assurance Structure for Crack Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Die edge delamination or cracking during the dicing of semiconductor wafers, exacerbated by the use of low-k dielectrics and laser grooving, leads to reliability issues and yield loss, with conventional screening methods being inefficient and time-consuming.
Innovation Solution
An integrated circuit with a die edge assurance structure featuring a plurality of v-shaped metal layers connected by ultra-thick vias, allowing for automated resistance measurement to detect cracks, thereby ensuring improved die edge integrity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional visual inspection and manual probing are used to screen for die edge delamination or cracking, then some defects can be detected, but the process is time-consuming and inefficient with low screening percentage
Solution Approach 1:
The patent replaces manual visual inspection and probing with an automated electrical testing method. Test structures are electrically connected to pads on the die, allowing automated test equipment to detect cracks and delamination through electrical measurements, significantly improving screening efficiency and throughput while maintaining detection capability
2Reliability
If low-k dielectric materials are used to reduce interconnect coupling capacitance, then coupling capacitance is reduced, but mechanical strength and adhesion are reduced leading to increased delamination and cracking
Solution Approach 1:
A crack arrest structure is formed around the periphery of the integrated circuit before dicing to intercept potential cracks. This structure acts as a protective barrier that prevents cracks from propagating across the die edge, compensating for the reduced mechanical strength caused by low-k dielectric materials
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient monitoring of die edge integrity for a large percentage of semiconductor dies with minimal additional cycle time and cost, reducing the likelihood of function failure due to cracking.
Implementation Method 1
A resistance of the edge assurance structure is measured, wherein the measured resistance provides an indication of any delamination or cracking
Data Source
AI summary
Integrated circuits with edge assurance structures are provided for more reliable and efficient monitoring of the die edge integrity using, for example, Automatic (or Automated) Test Equipment (ATE). The edge assurance structures can be used to test, for example, all (100%) of the production materials with virtually no extra cycle time and cost. The edge assurance structure can be located around an edge of the integrated circuit. The edge assurance structure can include a plurality of v-shaped structures that are connected to each other using a plurality of ultra-thick vias. The integrated circuit can include a pad that is coupled to the edge assurance structure. The pad can be used to measure a resistance of the edge assurance structure.