Semiconductor Die Edge Passivation for Dicing-Free Separation
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Solution Overview
Problem
Conventional dicing techniques for semiconductor die separation generate particles that cause yield loss and are incompatible with advanced materials, leading to reliability issues and challenges in integrating new materials and deploying advanced packaging techniques.
Innovation Solution
A passivation layer is applied around the edges of semiconductor dies, including a diffusion barrier, and an alternative die separation method that eliminates conventional dicing steps by using trenches filled with an adhesive material and thinning the substrate from the back side, reducing mechanical stress and contaminants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dicing techniques are used for semiconductor die separation, then die separation is achieved, but particles are generated causing yield loss and reliability issues
Solution Approach 1:
The harmful dicing step is completely removed from the manufacturing process. Instead of using conventional dicing techniques that generate particles, the patent extracts and eliminates this problematic step by implementing an alternative die separation method that achieves die separation without mechanical cutting, thereby eliminating particle generation and improving yield and reliability
Solution Approach 2:
The mechanical dicing system is replaced with a chemical/thermal separation approach. The patent uses a release layer that allows dies to be separated through non-mechanical means, substituting the blade-based mechanical cutting system with a method that avoids contact and particle generation, thus resolving the contradiction between achieving separation and avoiding harmful particles
2Adaptability or versatility
If conventional dicing techniques are used, then die separation is achieved, but compatibility with advanced materials is lost
Solution Approach 1:
The dicing step that creates incompatibility with advanced materials is extracted and removed from the manufacturing process. The patent replaces this step with a separation method using a release layer that does not involve mechanical cutting, thereby maintaining compatibility with advanced materials while still achieving die separation
Solution Approach 2:
A release layer is introduced as an intermediary element between the substrate and the dies. This release layer mediates the separation process, allowing dies to be released without direct mechanical contact that would damage advanced materials. The release layer acts as a buffer that enables separation while preserving material integrity and compatibility
3Adaptability or versatility
If substrate is thinned from back side, then three-dimensional interconnects can be formed, but mechanical stress increases
Solution Approach 1:
The release layer is prepared in advance before substrate thinning and die separation. This preliminary action creates a predetermined separation path that will guide the die release process, preventing stress concentration during separation. By preparing the release structure beforehand, the patent enables stress-free die release after thinning, resolving the contradiction between enabling 3D interconnects and managing mechanical stress
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases particle counts, improves yield and reliability, facilitates integration of new materials, reduces production costs, and enables advanced packaging techniques by eliminating dicing-related contaminants and mechanical stress.
Implementation Method 1
filling each of the plurality of trenches with an adhesive material
Implementation Method 2
The passivation layer may include a diffusion barrier (e.g., a nitride layer) to block contaminants (e.g., metallic atoms such as copper) from diffusing through silicon substrate of the semiconductor die
Data Source
AI summary
Methods for protecting edges of semiconductor dies are disclosed. Further, the disclosed methods provide for separating the semiconductor dies without using a dicing technique. In one embodiment, a plurality of trenches may be formed on a front side of a substrate including a plurality of semiconductor dies. Individual trenches may correspond to scribe lines of the substrate where each trench includes a depth greater than a final thickness of the semiconductor dies. A dielectric layer may be formed on sidewalls of the trenches, thereby protecting the edges of the semiconductor dies, prior to filling the trenches with an adhesive material. Subsequently, the substrate may be thinned from a back side such that the adhesive material in the trenches may be exposed from the back side. The adhesive material may be removed to singulate individual semiconductor dies of the plurality from the substrate.