Die-Embedded PCB Package for Mixed-Thickness Dies and Symmetric Vias
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Solution Overview
Problem
The challenge lies in reliably embedding ultra-thin dies with varying thicknesses within a PCB laminate without causing damage, as existing methods struggle to handle and integrate dies thinner than 40 μm, leading to asymmetrical microvia lengths and reduced contact areas, which complicates design and increases the risk of package warpage.
Innovation Solution
A die embedded package is developed where a thinner first bare die is encapsulated to match the thickness of a thicker second bare die, with additional protective layers to enhance robustness and symmetry of microvias, allowing for equal via lengths on both sides and improved handling during embedding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If ultra-thin dies (e.g., 40 μm) are embedded inside a PCB laminate, then the die thickness is reduced to meet design requirements, but the handling risk and damage probability increase significantly
Solution Approach 1:
The ultra-thin die is embedded within a cavity in the PCB laminate, nesting the fragile component within a protective structure. The cavity provides mechanical support and protection during handling, allowing the thin die to be processed reliably without direct exposure to external forces.
Solution Approach 2:
The PCB laminate structure is designed with a cavity that provides cushioning support before the die embedding process. This pre-prepared protective structure prevents damage during handling and embedding operations, addressing the fragility issue of ultra-thin dies in advance.
2Length of moving object
If driver dies are thinned to match SFET die thickness (e.g., 40 μm), then all dies have uniform thickness, but the via depth becomes asymmetrical and contact area decreases
Solution Approach 1:
Instead of thinning all dies to uniform thickness, the invention accepts asymmetrical die thicknesses and compensates by creating asymmetrical via lengths. The microvias are designed with different depths on each side of the die to match the actual die thickness, maintaining equal effective contact areas despite the thickness difference.
Solution Approach 2:
The via structure is customized locally for each die based on its actual thickness. Each die position has microvias with specific length characteristics tailored to that die's dimensions, optimizing the contact area and electrical connection for each local position rather than applying a uniform via design.
3Reliability
If driver dies are not thinned and are embedded together with thin SFET dies, then handling is easier, but the via lengths become asymmetrical and manufacturing complexity increases
Solution Approach 1:
The invention changes the via length parameter to accommodate different die thicknesses. By adjusting the microvia length on each side of the die based on the actual die thickness, the system handles dies of varying thicknesses without requiring uniform thinning, thus maintaining handling reliability while managing manufacturing complexity through parameter optimization.
4Reliability
If microvias are made longer to reach ultra-thin dies, then electrical contact is achieved, but the effective contact area on the die pad decreases due to cone shape
Solution Approach 1:
The invention optimizes the via length parameter to be just sufficient to reach the ultra-thin die, avoiding excessive length that would worsen the cone effect. By carefully controlling the via length to match the die thickness, the design achieves reliable electrical contact while maximizing the effective contact area on the die pad.
Data Source
AI summary
A die embedded package is disclosed. In one example, the die embedded package includes a first bare die and a second bare die, the first bare die being thinner than the second bare die, a first encapsulation material encapsulating the first bare die, wherein the total thickness of the first encapsulation and the first bare die is approximately equal to the thickness of the second bare die. An outer surface of the first encapsulation material and an outer surface of the second bare die are arranged coplanarly. A first and second set of electrically conductive vias electrically contact the first bare die. A third set of electrically conductive vias electrically contacts the second bare die.