Die-to-Die Interconnect Fault Isolation Using Asynchronous Buffers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for isolating faults in die-to-die interconnects are complex and difficult, especially in advanced packaging technologies, and there is a need for improved systems and methods to identify physical defects such as open or short failures without physical failure analysis.

Innovation Solution

A system and method using a transmission path from a transmitter to an asynchronous buffer, combined with a voltage reference circuitry that selectively outputs different voltages, allowing the asynchronous buffer to distinguish between no failure, open failure, and short failure in die-to-die interconnects, without requiring physical access or calibration of phase-locked loops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If physical failure analysis is used to pinpoint defects in die-to-die interconnects, then measurement precision is improved, but device complexity and difficulty of operation worsen due to inaccessibility of stacked chiplets

Engineering Contradiction:
Improvedefect identification accuracyVSAvoidtest accessibility
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The patent introduces an intermediary test mechanism using voltage reference circuitry and asynchronous buffers that mediate between the inaccessible interconnects and the test equipment. This allows fault detection without direct physical access to the stacked chiplets, resolving the contradiction between measurement precision and ease of operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces physical mechanical access methods with electrical signal-based testing. By substituting mechanical probing with electrical voltage comparisons through the asynchronous buffer, the system achieves defect identification without requiring physical access to the interconnects

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If traditional fault isolation methods are used for die-to-die interconnects, then reliability is improved through thorough testing, but loss of time increases due to complex testing procedures

Engineering Contradiction:
Improveinterconnect fault detectionVSAvoidtest duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by pre-configuring the voltage reference circuitry and asynchronous buffers during manufacturing, enabling rapid fault isolation during operation. The test capability is built-in advance, eliminating the need for complex external testing procedures and reducing test duration while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the essential fault detection function from complex traditional testing methods by isolating the core comparison operation in the asynchronous buffer. This extraction simplifies the testing process to a single comparison operation, significantly reducing test time while maintaining reliable fault detection

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If analog calibration and phase-locked loop calibration are performed for fault isolation, then measurement precision is improved, but use of energy increases and device complexity worsens

Engineering Contradiction:
Improvefault isolation accuracyVSAvoidcalibration power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The asynchronous buffer performs self-service by automatically comparing voltages without requiring external calibration procedures. The circuit self-calibrates through its inherent voltage comparison mechanism, eliminating the need for power-intensive analog and phase-locked loop calibration while maintaining measurement precision

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12474401B2Systems and methods for isolating faults in die-to-die interconnects
Publication Date: 2025.11.18 MICROSOFT TECHNOLOGY LICENSING LLC
  • US12474401B2 patent drawing
  • US12474401B2 patent drawing
  • US12474401B2 patent drawing

AI summary

Systems and methods for isolating faults in die-to-die interconnects are provided. A method includes providing a first transmission path, along a die-to-die interconnect, from a transmitter associated with a first die to an asynchronous buffer associated with a second die. The method further includes providing a second transmission path from voltage reference circuitry associated with the second die to the asynchronous buffer associated with the second die. The method further includes simultaneously enabling both the first transmission path and the second transmission path to allow the asynchronous buffer to receive inputs from both the transmitter associated with the first die and the voltage reference circuitry associated with the second die, such that the inputs received by the asynchronous buffer are indicative of: (1) no failure in the die-to-die interconnect, (2) an open failure in the die-to-die interconnect, or (3) a short failure in the die-to-die interconnect.