Die Interconnect Signal Management for Mixed-Voltage Interfaces
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Solution Overview
Problem
In microelectronic assemblies, the need for separate voltage regulators for parallel interfaces operating at different voltages complicates receiver design and increases costs, while common voltage regulators lead to inefficiencies and higher operating voltages.
Innovation Solution
Providing a reference power signal from each die to the other allows parallel interfaces to operate at different voltages, using a simple receiver design and optimizing voltage usage, thereby reducing costs and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If separate voltage regulators are used for parallel interfaces operating at different voltages, then voltage optimization and operational efficiency are improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent introduces a reference signal as an intermediary mechanism that allows receivers to operate at different voltages without requiring separate voltage regulators for each interface. The reference signal enables voltage-independent operation by providing a common reference for signal reception, thereby resolving the contradiction between voltage optimization and device complexity
Solution Approach 2:
The reference signal serves multiple functions: it provides voltage reference for receivers operating at different voltages, enables interoperability between interfaces with different voltage requirements, and eliminates the need for separate voltage regulators. This multi-functionality resolves the contradiction by achieving voltage optimization without increasing device complexity
2Device complexity
If common voltage regulators are used for all parallel interfaces, then device complexity is reduced, but energy efficiency decreases and operating voltage must be higher
Solution Approach 1:
The patent applies local quality by allowing each receiver to operate at its optimal voltage level while sharing a common reference signal infrastructure. Instead of using a single voltage regulator for all interfaces, each receiver can be powered at its specific voltage requirement (e.g., 3.3V or 1.8V) while using the reference signal for proper operation, thereby improving energy efficiency without significantly increasing device complexity
3Productivity
If separate voltage regulators are used for each parallel interface, then operational efficiency is improved, but receiver design complexity increases
Solution Approach 1:
The reference signal acts as a mediator that simplifies receiver design while enabling separate voltage operation. Instead of requiring complex voltage regulation circuitry in each receiver, the reference signal provides the necessary voltage reference externally, thereby maintaining operational efficiency while reducing receiver design complexity
Solution Approach 2:
The receivers are designed to be self-sufficient by using the reference signal to automatically adjust their operation at different voltage levels without requiring complex integrated voltage regulation. Each receiver serves itself by utilizing the reference signal to operate optimally at its designated voltage, thereby improving operational efficiency while keeping receiver design simple
Data Source
AI summary
A microelectronic assembly may include a first microelectronic device, a second microelectronic device, a first signal link, a second signal link, and a first power connection. The first microelectronic device may include a first interface powered at a first voltage. The second microelectronic device may include a second interface powered at a second voltage. The first signal link may supply a first signal at the first voltage from the first interface to the second interface. The second signal link may supply a second signal at the second voltage from the second interface to the first interface. The first power connection may supply a first reference signal at the first voltage from the first interface to the second interface.