Die-to-Die I/O Routing on Opposing Surfaces for Better Power Delivery
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Solution Overview
Problem
The complexity and cost of die-to-die routing in integrated circuit components are increased by the use of embedded bridges, leading to reduced power delivery efficiency, process complexity, and yield loss due to heterogeneous chiplets and limited real estate for through-dielectric vias.
Innovation Solution
Die-to-die I/O routing is achieved using opposing surfaces of integrated circuit dies, eliminating the need for embedded bridges and allowing for more through-dielectric vias for power delivery, simplifying the processing flow, and improving yield by integrating homogeneous chiplets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If embedded bridges are used for die-to-die routing, then signal routing between dies is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the embedded bridge component from the routing structure. Instead of using complex embedded bridges to route signals between dies, the invention uses direct bonding interfaces with redistribution layers on opposing die surfaces, removing the unnecessary intermediate structure and simplifying the overall device complexity while reducing manufacturing cost
Solution Approach 2:
The patent inverts the traditional routing approach by utilizing opposing die surfaces for signal routing instead of embedding routing structures within a single die. This inversion allows signals to be routed externally between bonded die surfaces, eliminating the need for embedded bridges and reducing device complexity
2Loss of energy
If embedded bridges are used for routing, then signal routing is enabled, but power delivery efficiency decreases
Solution Approach 1:
The patent removes the embedded bridge structure that was impeding power delivery. By eliminating this intermediate structure and enabling direct bonding between dies with opposing surfaces, power can be delivered more efficiently through direct electrical connections without the energy losses associated with complex embedded routing structures
3Adaptability or versatility
If heterogeneous chiplets are used, then design flexibility increases, but yield loss increases
Solution Approach 1:
The patent creates a universal bonding interface using redistribution layers on opposing die surfaces that can accommodate heterogeneous chiplets of different types, sizes, and technologies. This universal interface approach maintains design flexibility while improving yield by enabling standardized bonding processes that are more reliable than previous heterogeneous integration methods
4Loss of energy
If through-dielectric vias are increased for power delivery, then power delivery efficiency improves, but real estate availability decreases
Solution Approach 1:
The patent transitions from planar routing within a single die to three-dimensional routing using opposing die surfaces. By utilizing the vertical dimension and bonding interfaces between stacked dies, the invention provides additional space for power delivery structures without consuming valuable real estate on the die surface, thereby improving power delivery efficiency while preserving die area
Data Source
AI summary
Input/output (I/O) routing from one integrated circuit die to other integrated circuit dies in an integrated circuit component comprising heterogeneous and vertically stacked die is made from the top and bottom surfaces of the integrated circuit die to the other dies. Die-to-die I/O routing from the die to laterally adjacent die is made from the top surface of the die via one or more redistribution layers. Die-to-die routing from the die to vertically adjacent die is made via hybrid bonding on the bottom surface of the die. Embedded bridges or chiplets or not used for die-to-die I/O routing, which can free up space for more through-dielectric vias to provide power and ground connections to the die, which can provide for improved power delivery.