Embedded Die Metal Etch Stop Fabrication Method
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Solution Overview
Problem
The over-etch process in forming circuit patterns is difficult to accurately control, leading to variations in circuit pattern impedance and electrical characteristics from batch to batch, which is undesirable.
Innovation Solution
A method involving patterning a photoresist layer, plating a patterned etch stop layer and conductor layer using a carrier as the electroplating electrode, followed by laminating with a dielectric material, and using patterned etch stop layers to prevent etching of conductor layers during carrier removal and via formation, ensuring controlled impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an over-etch process is used to remove excess plated copper and ensure complete feature filling, then the circuit pattern is successfully formed without shorts, but the etching depth varies from batch to batch causing impedance variations
Solution Approach 1:
An etch stop layer is introduced as an intermediary between the dielectric layer and the plated copper. This etch stop layer is selectively etched away to remove excess copper while the etch process is automatically terminated when reaching the etch stop layer, providing precise control over etching depth and eliminating batch-to-batch variations.
Solution Approach 2:
The etch stop layer is deposited in advance before the plated copper formation. This preliminary action creates a predefined termination point for the subsequent etching process, ensuring consistent etching depth across different batches without requiring complex real-time control during etching.
2Ease of manufacture
If an electroless plating operation is used to plate the etch stop layer, then the process is simpler, but additional desmear process steps are required
Solution Approach 1:
The patent replaces electroless plating with electroplating for depositing the etch stop layer. This substitution eliminates the need for a desmear process step, simplifying the overall manufacturing process while maintaining ease of manufacture. The electroplating process directly deposits the etch stop material without requiring additional intermediate steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies manufacturing, reduces fabrication costs, and ensures consistent circuit pattern impedance by preventing etching of conductor layers during carrier removal and via formation, maximizing yield and minimizing defects.
Implementation Method 1
a first patterned etch stop layer is plated on the first carrier and within the circuit pattern artifacts and a first patterned conductor layer is plated on the first patterned etch stop layer. By using the first carrier as the electroplating electrode for plating of the first patterned etch stop layer and the first patterned conductor layer
Implementation Method 2
As the etch stop metal of the first and second patterned etch stop layers is selectively etchable compared to a conductor metal of the first and second patterned conductor layers as well as the first and second carriers, the first and second patterned etch stop layers provide an etch stop for the carrier etch process
Data Source
AI summary
A method of forming an electronic component package includes forming a patterned dielectric layer comprising circuit pattern artifacts and at least one electronic component opening. An etch stop metal protected circuit pattern is plated with the circuit pattern artifacts. An electronic component is mounted in the electronic component opening. The etch stop metal protected circuit pattern provide an etch stop for substrate formation etch processes. In this manner, etching of a patterned conductor layer is avoided insuring that impedance is controlled to within tight tolerance.