Semiconductor Die Notch for Wirebond Clearance
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Solution Overview
Problem
Semiconductor device packaging faces challenges in reducing stack thickness while maintaining functionality, as traditional methods require spacer usage or smaller die sizes to accommodate wire bonds, limiting the formation of stacks with equally sized die.
Innovation Solution
The implementation of notch structures on semiconductor device die allows for wire bond clearance without spacers, enabling the stacking of similarly sized die by forming notches on the die to accommodate wire bonds, thereby reducing package thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If die spacers are utilized to provide space for wire bonds, then wire bond formation is enabled, but stack thickness increases
Solution Approach 1:
The patent transitions from providing wire bond clearance in the vertical dimension (using spacers that increase stack thickness) to providing clearance in the horizontal dimension (through notches cut into the die body). This dimensional shift allows wire bonds to route through lateral notches rather than requiring vertical spacing, thereby enabling thin-stack configurations while maintaining wire bond formation capability.
2Reliability
If smaller die are stacked to accommodate wire bonds, then wire bond space is provided, but stacking options are reduced and equal-sized die cannot be used
Solution Approach 1:
The patent segments the die body by introducing notches that create localized clearance regions. This segmentation allows wire bonds to be accommodated within specific notched regions without reducing the overall die size, thereby maintaining the ability to stack equal-sized die while still providing necessary wire bond formation space.
3Length of moving object
If die thickness is reduced to minimize package thickness, then package thickness is reduced, but wire bond clearance becomes insufficient
Solution Approach 1:
The patent compensates for reduced vertical clearance (due to thinner die) by creating horizontal clearance through notches. The notches provide lateral space for wire bonds to form and route, decoupling the wire bond clearance requirement from the vertical die thickness, thereby enabling thin-package designs with adequate wire bond accommodation.
Data Source
AI summary
A first semiconductor device die is provided having a bottom edge incorporating a notch structure that allows sufficient height and width clearance for a wire bond connected to a bond pad on an active surface of a second semiconductor device die upon which the first semiconductor device die is stacked. Use of such notch structures reduces a height of a stack incorporating the first and second semiconductor device die, thereby also reducing a thickness of a semiconductor device package incorporating the stack.