Die and Package Co-Design Rule Awareness System

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Solution Overview

Problem

Existing electronic circuit design systems face issues where changes in package layouts are reflected in die layouts, leading to unwanted errors and design rule violations without user awareness, causing costly iterations to correct violations in densely packed die layouts.

Innovation Solution

A computer-implemented method and system that allows users to edit package layouts while dynamically mirroring edits in die layouts, displaying potential design rule check violations and shorts, enabling users to alter edits based on impact analysis and calculating minimum movements to satisfy design rules for both layouts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If package layout and die layout are operated upon concurrently with automatic mirroring, then design efficiency is improved, but design rule violations and errors are introduced

Engineering Contradiction:
Improvedesign efficiencyVSAvoiddesign rule compliance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system provides real-time feedback by displaying design rule violations and shorts in the package layout when they are detected in the die layout. This feedback mechanism allows designers to immediately see the impact of their edits and make corrective adjustments, resolving the contradiction between efficient concurrent editing and maintaining design rule compliance.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system acts as an intermediary by automatically detecting design rule violations in the die layout and translating them into visual feedback in the package layout. This intermediary function bridges the two layouts, allowing concurrent operation while preventing rule violations from going unnoticed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If automatic mirroring of edits from package layout to die layout is implemented, then design coordination is improved, but unwanted errors are introduced

Engineering Contradiction:
Improvedesign coordinationVSAvoidunwanted errors
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The system provides immediate visual feedback by displaying shorts and design rule violations in the package layout that result from automatic mirroring operations. This allows designers to understand the impact of automated changes and make informed decisions about whether to accept or modify them.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs self-service by automatically detecting and displaying errors caused by mirroring operations without requiring manual checking. The system monitors its own output and provides corrective information to the user.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If design rule check violations are detected and displayed, then design accuracy is improved, but additional processing time is required

Engineering Contradiction:
Improvedesign accuracyVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The system performs design rule checking continuously in the background during interactive editing sessions, rather than requiring separate batch processing steps. This continuous monitoring provides accurate violation detection without interrupting the design workflow or requiring additional processing time after editing is complete.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10643016B1System, method and computer program product for design rule awareness associated with die and package electronic circuit co-design
Publication Date: 2020.05.05 CADENCE DESIGN SYST INC
  • US10643016B1 patent drawing
  • US10643016B1 patent drawing
  • US10643016B1 patent drawing

AI summary

The present disclosure relates to a computer-implemented method for electronic circuit design awareness. Embodiments may include providing, using a processor, an electronic design having a package layout and a die layout associated therewith. Embodiments may also include displaying at a graphical user interface, the package layout and allowing, at the graphical user interface, a user to edit the package layout. Embodiments may further include determining, using the processor, an impact of the edit on the die layout and in response to the edit, mirroring the edit at the die layout.