Semiconductor Die Package Seal Ring ESD Routing During Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
During the bonding process of semiconductor die packages, electrostatic charges can accumulate in capacitor circuitry, leading to electrical discharges that damage logic circuitry, resulting in reduced performance or scrapped packages, which decreases yield and requires additional resources for manufacturing.
Innovation Solution
Incorporating an electrostatic discharge (ESD) protection circuit with discharge paths in the seal ring structure that routes electrical charges from capacitor circuitry to a power management integrated circuit (PMIC), rather than through logic circuitry, thereby preventing damage during bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If capacitor circuitry is integrated into the semiconductor die package, then the functionality and performance of the device are improved, but electrostatic charges accumulate during bonding leading to electrical discharges that damage logic circuitry
Solution Approach 1:
A discharge path is introduced as an intermediary component between the capacitor circuitry and the logic circuitry. This discharge path includes a first portion connected to the capacitor circuitry and a second portion connected to the logic circuitry, providing a controlled route for electrostatic charge dissipation. The intermediary discharge path prevents direct electrical discharge through the logic circuitry, thereby protecting it from damage while maintaining the functionality of the capacitor circuitry.
2Productivity
If bonding process is performed to integrate semiconductor dies, then the density and integration level are increased, but electrostatic discharge during bonding damages logic circuitry reducing yield
Solution Approach 1:
The discharge path is pre-configured and prepared before the bonding process occurs. The first portion of the discharge path is formed on a first semiconductor die and the second portion is formed on a second semiconductor die, with connection structures prepared in advance. This preliminary preparation ensures that when bonding occurs and electrostatic charges accumulate, the discharge path is already in place to safely conduct the discharge, preventing damage to the logic circuitry and maintaining high yield.
3Productivity
If electrostatic discharge protection is added to prevent logic circuitry damage, then manufacturing yield is improved, but device complexity increases
Solution Approach 1:
The discharge path is designed to serve multiple functions within the semiconductor device package. It provides electrostatic discharge protection for the logic circuitry, maintains signal integrity during bonding operations, and can be integrated with existing circuitry without requiring completely separate protection circuits. The discharge path structure can be formed using standard semiconductor fabrication processes, making it a multi-functional component that addresses protection needs without proportionally increasing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the likelihood of damage to logic circuitry and increases semiconductor die package yield by providing a safe path for electrical discharges, thus optimizing manufacturing resources.
Implementation Method 1
electrostatic charges can accumulate in capacitor circuitry, leading to electrical discharges that damage logic circuitry
Data Source
AI summary
Some implementations herein describe apparatuses and techniques related to a semiconductor die package including a first integrated circuit die including capacitor circuitry bonded with a second integrated circuit die including logic circuitry. The semiconductor die package may include discharge paths incorporated into a seal ring structure spanning the first integrated circuit die and the second integrated circuit die. The discharge paths may lead to a power management integrated circuit included in the second integrated circuit die. During a bonding of the first integrated circuit die and the second integrated circuit die, the discharge paths incorporated into the seal ring structure may route an electrical discharge from the capacitor circuitry of the first integrated circuit die to the power management integrated circuit.