3D Die Package Via Segmentation for Signal Delay
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Solution Overview
Problem
Current TSV (Through-Silicon Via) technology is unstable and costly, making it difficult to compete with traditional package techniques for high-speed and high-density DRAM applications.
Innovation Solution
A die package structure comprising a first and second die, a core material layer with vias filled with metal for electrical contact, and a dielectric layer with breaches to expose signal contacting units, allowing for quick formation of pad circuits and a simple 3D package structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If TSV (Through-Silicon Via) technique is used to achieve high density and high speed structure, then chip performance increases and conductive path shortens, but manufacturing stability decreases and cost increases
Solution Approach 1:
The patent divides the package structure into multiple segments: a first die, a core material layer, and a second die stacked vertically. The via structure is segmented into a first via in the first die, a second via in the core material layer, and a third via in the second die. This segmentation allows each component to be manufactured and tested independently before assembly, improving manufacturing stability while maintaining the high-density 3D structure.
Solution Approach 2:
The core material layer acts as an intermediary between the first die and second die, providing mechanical support and electrical connection. The via structure uses metal filling material as an intermediary to establish electrical contact between the stacked dies, enabling signal transmission while reducing the complexity of direct through-silicon via fabrication.
2Loss of time
If TSV technique is used to achieve high density structure, then conductive path shortens and signal delay decreases, but manufacturing cost increases
Solution Approach 1:
The patent transitions from traditional 2D planar packaging to 3D vertical stacking, arranging dies and via structures in three dimensions. This dimensional change shortens the conductive path and reduces signal delay while maintaining manufacturing feasibility through standardized vertical assembly processes.
Solution Approach 2:
The via structures are pre-formed in each die and the core material layer before final assembly. Metal filling material is deposited in advance to create conductive pathways, and breach portions are formed in the encapsulant material beforehand to expose signal contacting units. These preliminary actions simplify the final assembly process and reduce manufacturing costs.
3Reliability
If complex via structures are used to achieve electrical contact between stacked dies, then connection reliability improves, but manufacturing complexity increases
Solution Approach 1:
The patent merges the via structures from multiple dies and the core material layer into a unified vertical via system. The first via, second via, and third via are aligned and connected through metal filling material to form a continuous conductive path, simplifying the overall structure while ensuring reliable electrical connection between stacked dies.
Solution Approach 2:
The via structure design is replicated across multiple dies and the core material layer, with each component containing similar via patterns that align during assembly. This copying approach ensures consistent electrical connections and simplifies manufacturing by using standardized designs throughout the package.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides a stable and cost-effective 3D package structure with reduced signal delay and power consumption, enhancing chip performance and storage capacity.
Implementation Method 1
at least one via, penetrating through the first die, the second die and the core material layer; a metal material, stuffing into the via, such that the first die, the second die, and the core material layer can be electrically contacted with each other
Data Source
AI summary
A die package structure, which comprises: a first die; a second die; a core material layer, provided between the first die and the second die; at least one via, penetrating through the first die, the second die and the core material layer; a metal material, stuffing into the via, such that the first die the second die, and the core material layer can be electrically contacted with each other; at least a signal contacting unit, contacting the metal material; and a dielectric layer, enclosing the first die, including at least one breach exposing the signal contacting unit.


