Semiconductor Die Package Warpage Management via Dual-Stage Encapsulation

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Solution Overview

Problem

High post-capillary underfill (CUF) wafer warpage leads to significant package assembly challenges in wafer level packages, with previous solutions like CUF material reformulation and wafer flattening offering limited warpage reduction and requiring frequent corrections, while not addressing singulated die warpage issues effectively.

Innovation Solution

A two-step encapsulation process is implemented, using capillary underfill or non-conductive film in the C4 area for bump reliability and a gap fill material with low modulus and low glass transition temperature to manage wafer and die warpage, enabling permanent low warpage effects and increased chip attach yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If CUF material reformulation is used to reduce warpage, then warpage reduction is achieved within narrow limits, but processability and reliability performance are compromised

Engineering Contradiction:
Improvewafer warpageVSAvoidprocessability and reliability performance
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The patent divides the encapsulation space into two distinct regions: C4 area filled with CUF material for bump reliability, and die-to-die space filled with gap fill material for warpage management. This segmentation allows each material to be optimized for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different materials with specific properties are applied to different locations: CUF material (with higher modulus and Tg) is used in the C4 area for mechanical support and bump reliability, while gap fill material (with low modulus and low Tg) is used in die-to-die spaces for warpage control. This local differentiation resolves the contradiction by assigning appropriate material properties to specific functional zones.

Inventive Principle:
Principle #3Local quality

2Shape

If wafer flattening is applied to address warpage, then temporary warpage reduction is achieved, but frequent corrections are required and singulated die warpage is not effectively addressed

Engineering Contradiction:
Improvewafer flatnessVSAvoidfrequent corrections required
Core Design Contradiction:
ShapeVSLoss of time

Solution Approach 1:

The gap fill material is applied during the encapsulation process before final assembly, establishing permanent warpage control. This preliminary action prevents the need for frequent subsequent corrections and addresses both wafer-level and singulated die warpage issues simultaneously.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the material parameters (modulus and glass transition temperature) of the encapsulation materials to achieve permanent warpage control. The low modulus and low Tg of the gap fill material enable it to effectively manage warpage without requiring frequent re-correction, unlike traditional wafer flattening methods.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If high post-CUF wafer warpage is present, then package assembly becomes challenging, but chip attach yield is significantly impacted after singulation

Engineering Contradiction:
Improvepackage assembly easeVSAvoidchip attach yield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The CUF material is specifically applied in the C4 area (around the bumps) where mechanical support is critical for package assembly, while the gap fill material is applied in die-to-die spaces where warpage control is critical for chip attach yield. This localized material distribution resolves both assembly challenges and yield issues.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses a composite encapsulation system combining two different materials: CUF material for mechanical strength and bump support, and gap fill material for warpage control. This composite approach simultaneously improves ease of manufacture and chip attach yield by addressing both assembly and warpage issues.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach results in increased downstream wafer process yield with permanent low warpage, reducing the need for frequent corrections and improving chip attach yield on the substrate by effectively managing warpage in both wafer and singulated die levels.

Implementation Method 1

capillary underfill or non-conductive film in the C4 area for bump reliability

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

gap fill material with low modulus and low glass transition temperature to manage wafer and die warpage

Methodology Applied
Scientific EffectElastic deformation: Elasticity

Data Source

PatentUS11676876B2Semiconductor die package with warpage management and process for forming such
Publication Date: 2023.06.13 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US11676876B2 patent drawing
  • US11676876B2 patent drawing
  • US11676876B2 patent drawing

AI summary

A device is disclosed. The device includes a first die, a plurality of chiplets above the first die, a first underfill material beneath the chiplets, and a gap fill material between the chiplets. The gap fill material is different from the first underfill material. An interface region is formed between the first underfill material and the gap fill material.