Semiconductor Die Packaging With Sidewall Film for Precise Thinning
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Solution Overview
Problem
Existing methods for thinning semiconductor dies during or after die to wafer bonding are costly and inefficient, requiring excessive dielectric materials and processes that compromise the integrity and precision of the dies.
Innovation Solution
A method involving the application of a film layer over semiconductor dies, followed by selective plasma etching to thin the dies while preserving the side surfaces, using anisotropic plasma etching to achieve precise and cost-effective thinning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If PECVD SiO2 films are used to fill gaps between dies, then the gaps can be filled up to about 40 μm deep, but an equivalent amount of SiO2 will also cover the surface of the dies, requiring grinding and chemical mechanical polishing which is prohibitively expensive
Solution Approach 1:
The patent applies a thick dielectric film selectively to the side surfaces of the semiconductor dies while avoiding excessive deposition on the top surfaces. This is achieved through controlled deposition processes that target lateral surfaces, allowing gap filling without requiring subsequent expensive removal processes on the die tops.
Solution Approach 2:
The patent segments the dielectric film application into distinct regions: thick film on side surfaces for gap filling, and minimal or no film on top surfaces. This segmentation eliminates the need for costly grinding and polishing operations while maintaining effective gap filling capability.
2Length of moving object
If die thickness is reduced considerably to meet end product specifications, then thinner die packages are achieved, but excessive dielectric filler material is required and the process becomes prohibitively expensive
Solution Approach 1:
The patent applies dielectric material locally where needed - specifically on the side surfaces of dies - rather than uniformly across all surfaces. This localized application reduces the total quantity of dielectric filler material required while still achieving the necessary gap filling for thin die packages.
Solution Approach 2:
The patent transitions from filling gaps primarily in the vertical dimension to utilizing lateral/dimensional space along the side surfaces of dies. By depositing dielectric material on vertical surfaces rather than only horizontal surfaces, the patent reduces the total volume of filler material needed.
3Manufacturing precision
If conventional plasma etching is used without side surface protection, then top surfaces can be etched, but the side surfaces are also etched which compromises die integrity
Solution Approach 1:
The patent applies a protective film to the side surfaces of the dies before performing plasma etching on the top surfaces. This preliminary protective action prevents unwanted etching of the side surfaces, maintaining die integrity while allowing precise top surface etching to proceed.
Solution Approach 2:
The patent introduces a protective dielectric film as an intermediary layer on the side surfaces. This intermediary protects the semiconductor material from plasma etching while allowing the etching process to proceed on the top surfaces, thereby maintaining both precision and integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables high-precision thinning of semiconductor dies with minimal surface roughness and efficient material use, allowing for faster etch rates and maintaining die integrity, suitable for 3D or 2.5D integration.
Implementation Method 1
plasma etching the top surfaces of the dies
Implementation Method 2
anisotropic plasma etching to achieve precise and cost-effective thinning
Implementation Method 3
the film layer which provides selective passivation of the die side walls during the main etch
Implementation Method 4
the silicon etch thinning step to be performed at a comparatively high etch rate of approximately 1-10 μm/minute
Data Source
AI summary
Packaging semiconductor dies having a first step of providing a substrate and a plurality of semiconductor dies interspaced on the substrate, there being an exposed surface of the substrate between the dies. Thereafter, a film is applied to the substrate to cover the plurality of semiconductor dies and the exposed substrate surface with a film layer, each die includes a top surface and at least one side surface, and the film layer extends across the top surfaces and along the side surfaces of the dies. Subsequently, the film is removed from the top surfaces of the dies, whilst leaving the film intact on the side surfaces of the dies. Thereafter the top surfaces of the dies are plasma etched and the film is removed from the side surfaces of the dies. The semiconductor dies are thinned for use in a variety of end applications.


