Die Pad Groove Layout to Prevent Die Bond Delamination

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Solution Overview

Problem

The reliability of semiconductor devices is compromised due to delamination between the die pad and the die bond material, particularly under temperature cycle loads, which affects the electrical reliability and performance of power semiconductor devices.

Innovation Solution

The semiconductor device design incorporates a die pad with a specific layout of grooves on its surface, allowing the die bond material to spread easily and increase adhesive strength around the semiconductor chip's periphery, preventing delamination by enhancing capillary action and thermal expansion management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a groove is formed in the die pad to improve die bond material spreading, then adhesive strength is improved, but device complexity increases

Engineering Contradiction:
Improveadhesive strengthVSAvoiddevice complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The die pad surface is segmented into multiple grooves that divide the bonding area into distinct regions. These grooves create multiple localized bonding zones that collectively enhance overall adhesive strength while maintaining a relatively simple overall structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Grooves are strategically positioned at specific locations on the die pad surface, particularly near the semiconductor chip periphery where delamination is most likely to occur. This local modification approach enhances adhesive strength precisely where needed without unnecessarily complicating the entire device structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If grooves are added to prevent delamination, then reliability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImprovereliabilityVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The grooves are pre-formed on the die pad surface before semiconductor chip mounting. This preliminary structuring ensures that when die bond material is applied, it naturally follows the groove patterns and achieves optimal distribution without requiring high-precision real-time adjustment during the bonding process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The groove dimensions (depth, width, spacing) are optimized to specific parameter ranges that balance reliability improvement with manufacturing feasibility. By establishing standardized groove parameters, the design achieves enhanced reliability while maintaining reasonable manufacturing precision requirements.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively prevents delamination between the die pad and the die bond material, improving the electrical reliability and thermal management of semiconductor devices, especially under high current and temperature fluctuations.

Implementation Method 1

allowing the die bond material to spread easily and increase adhesive strength around the semiconductor chip's periphery, preventing delamination by enhancing capillary action

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS20250096078A1Semiconductor device and method of manufacturing the same
Publication Date: 2025.03.20 RENESAS ELECTRONICS CORP
  • US20250096078A1 patent drawing
  • US20250096078A1 patent drawing
  • US20250096078A1 patent drawing

AI summary

A first surface of a die pad has: a first region; a second region that includes points respectively overlapping with four corners of a semiconductor chip; and a third region that is located around the second region. Also, a plurality of grooves is formed in the die pad at the second region. Also, each of the plurality of grooves terminates at a position not reaching each of the first region and the third region. Also, the plurality of grooves includes: a plurality of first grooves each extending in an extending direction of one of two diagonal lines of the semiconductor chip; and a plurality of second grooves each extending in an extending direction of another one of the two diagonal lines. Also, in each of the plurality of first grooves is arranged so as to intersect with one or more of the plurality of second grooves.