Semiconductor Die Passivation Structure for Gapless Hybrid Bonding
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Solution Overview
Problem
The integration of multiple semiconductor devices into a single semiconductor wafer poses challenges in wafer level packaging, particularly in achieving reliable electrical connections and efficient packaging processes.
Innovation Solution
The implementation of a manufacturing process that includes the formation of a composite passivation structure with alternating high-density plasma chemical vapor deposition (HDP-CVD) and chemical vapor deposition (CVD) processes, which facilitates gapless formation of passivation layers and enhances the reliability of bonding layers for hybrid bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafer level packaging is used to integrate multiple semiconductor devices, then productivity and integration efficiency are improved, but manufacturing precision and reliability of electrical connections deteriorate
Solution Approach 1:
The patent divides the passivation structure into multiple alternating layers (HDP-CVD and CVD layers) with different properties. Each layer serves specific functions: HDP-CVD layers provide mechanical strength and gap-filling, while CVD layers provide planarity and bonding surfaces. This segmentation allows simultaneous achievement of high integration efficiency and connection reliability.
Solution Approach 2:
The patent uses composite passivation structures combining different deposition methods (HDP-CVD and CVD) to create layers with complementary properties. The alternating structure leverages the advantages of each deposition technique: HDP-CVD for stress control and gap filling, CVD for surface planarity and bonding quality, thereby resolving the contradiction between integration efficiency and connection reliability.
2Reliability
If composite passivation structure with alternating HDP-CVD and CVD processes is used, then reliability of bonding layers is improved, but device complexity and manufacturing process complexity increase
Solution Approach 1:
The manufacturing process is segmented into alternating HDP-CVD and CVD deposition steps, where each segment performs a specific function. HDP-CVD segments create stress-balanced, gap-filled layers, while CVD segments create planar bonding surfaces. This functional segmentation improves bonding reliability while keeping each process step relatively simple and well-understood.
Solution Approach 2:
The patent changes deposition parameters (deposition method, temperature, pressure) between alternating layers to optimize specific properties. HDP-CVD uses plasma-enhanced conditions for better gap filling, while CVD uses different conditions for superior planarity. These parameter changes are systematic and controlled, managing complexity through standardization.
3Productivity
If gapless formation of passivation layers is achieved, then manufacturing yield is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different deposition qualities locally: HDP-CVD layers are optimized for gap-filling in concave regions between conductive pads, while CVD layers are optimized for planarity in flat regions. This local quality approach ensures gapless formation without requiring uniform high precision across the entire structure, thereby improving yield while managing precision requirements.
Solution Approach 2:
The alternating passivation layers are designed to conform to the curved surfaces and concave regions between conductive pads. HDP-CVD layers specifically fill these curved gaps, ensuring complete coverage without voids. This curvature-adaptive approach achieves gapless formation with controlled precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved reliability and reduced failure rates for semiconductor dies, thereby increasing manufacturing yield and reducing production costs, while also enabling effective integration of multiple semiconductor devices into a single package.
Implementation Method 1
high-density plasma chemical vapor deposition (HDP-CVD) processes
Implementation Method 2
high-density plasma chemical vapor deposition (HDP-CVD) processes
Implementation Method 3
chemical vapor deposition (CVD) processes
Data Source
AI summary
A semiconductor die includes an interconnection structure, conductive pads, a first passivation layer, and a second passivation layer. The conductive pads are disposed over and electrically connected to the interconnection structure. The first passivation layer and the second passivation layer are disposed over the conductive pads. The second passivation layer includes a first portion located between two adjacent conductive pads, and a width of the first portion of the second passivation layer continuously decreases toward the interconnection structure.