Semiconductor Die Pick-and-Place Without Dicing Tape Stress
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Solution Overview
Problem
Current semiconductor dies are prone to chipping, cracking, and micro-damage during the die pickup process due to their fragile nature and the use of dicing tape, which applies significant stress during assembly.
Innovation Solution
A method involving partial dice before grind and backgrinding of the wafer, followed by lamination of a die attach film (DAF) without dicing tape, using a vacuum chuck for die support, and a pick and place robot with reduced forces to minimize stress on the dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If dicing tape is used to hold semiconductor dies during assembly, then the dies can be easily handled and transferred, but the dies are subjected to significant stress that causes chipping, cracking, and micro-damage
Solution Approach 1:
The patent removes the dicing tape from the assembly process entirely. Instead of using dicing tape to hold and transfer dies, the invention uses a carrier wafer with recesses that physically accommodate the dies during assembly, eliminating the need for adhesive tape and its associated stress problems.
Solution Approach 2:
The patent introduces a carrier wafer as an intermediary device between the die source and the final assembly. The carrier wafer with its precisely engineered recesses provides mechanical support and positioning for the semiconductor dies without requiring adhesive bonding, thereby eliminating stress-induced damage while maintaining ease of handling.
2Quantity of substance
If semiconductor dies are made with large numbers of memory array layers to increase storage capacity, then storage capacity increases, but the dies become more fragile and susceptible to damage
Solution Approach 1:
The patent provides protective recesses in the carrier wafer that cradle the semiconductor dies before assembly is complete. These recesses act as a cushioning mechanism that protects the fragile, high-capacity dies from mechanical stress and damage during the assembly process, allowing high storage capacity dies to be handled safely.
3Volume of moving object
If the wafer is thinned through backgrinding to reduce profile, then the device footprint is reduced, but the dies become more vulnerable to damage during handling
Solution Approach 1:
The carrier wafer with its recesses provides protective support for thinned semiconductor dies throughout the assembly process. The recesses cradle the thin profiles, preventing bending and breakage that would otherwise occur with backgrounded, ultra-thin dies, thereby enabling thin-profile devices without compromising handling robustness.
Solution Approach 2:
The patent changes the mechanical support parameters by transitioning from adhesive-based support (dicing tape) to mechanical recess-based support (carrier wafer). This parameter change allows thinned dies to be supported distributedly across their surfaces rather than at discrete points, maintaining robustness while enabling reduced wafer thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces stress on semiconductor dies during assembly, preventing chipping and cracking, and eliminates the need for dicing tape, thereby enhancing the reliability and reducing fabrication costs.
Implementation Method 1
holding the inactive surface of the wafer on a vacuum chuck
Data Source
AI summary
Semiconductor dies formed on a wafer may be picked from the wafer with little or no stress, thus preventing cracking and damage to the semiconductor dies. A die attach film (DAF) layer is laminated onto an inactive surface of the wafer and the DAF layer is cut in the outline of the dies. The inactive surface of the wafer may then be supported on a vacuum chuck without using a dicing tape, and dies transferred from the wafer using a pick and place robot.