Semiconductor Die Side-Trace Interconnects Without TSVs
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Solution Overview
Problem
Conventional semiconductor device packaging techniques face challenges in increasing circuit density due to the complexity and cost associated with connecting multiple semiconductor dies, particularly with the use of through-silicon vias (TSVs), which can lead to manufacturing bottlenecks and reduced allowable circuit density.
Innovation Solution
The implementation of semiconductor assemblies where multiple semiconductor dies are connected through exposed traces extending from the side surfaces of dielectric layers, eliminating the need for rigid connective structures and reducing complexity, allowing for increased circuit density without the use of TSVs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon vias (TSVs) are used to connect multiple semiconductor dies, then electrical connection between dies is achieved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent extracts the connection function from the bulk silicon material by forming traces on the surface of the semiconductor die. Instead of creating through-silicon vias that penetrate the entire die thickness, the connection traces are formed on the surface and extend from side surfaces, eliminating the need for complex TSV formation processes while maintaining electrical connectivity between stacked dies.
Solution Approach 2:
The patent transitions from three-dimensional through-silicon via connections to a combination of surface-level trace connections and vertical stacking. The traces extend from side surfaces of the die, utilizing the lateral dimension to establish connections that then connect vertically to subsequent dies, thereby reducing the need for deep vertical penetrations through the silicon substrate.
2Reliability
If through-silicon vias (TSVs) are used to connect multiple semiconductor dies, then electrical connection between dies is achieved, but production speed decreases due to manufacturing bottlenecks
Solution Approach 1:
The connection traces are formed on the semiconductor die surface during the standard semiconductor fabrication process, before the die are stacked and packaged. This preliminary formation of traces eliminates the need for post-stack TSV formation and filling operations, thereby accelerating the overall manufacturing process and removing production bottlenecks associated with TSV fabrication.
3Reliability
If through-silicon vias (TSVs) are used to connect multiple semiconductor dies, then electrical connection between dies is achieved, but allowable circuit density is reduced
Solution Approach 1:
By extracting the connection function from the silicon bulk to the surface traces, the patent frees up silicon real estate that would otherwise be consumed by TSV structures. This allows for higher circuit density as the silicon area can be more efficiently utilized for active circuit elements rather than connection structures.
Solution Approach 2:
The patent changes the geometric parameters of the connection structure from large-diameter cylindrical TSVs to thin, planar traces. This parameter change reduces the area footprint of connection structures, thereby increasing the allowable circuit density on the semiconductor die surface.
Data Source
AI summary
This document discloses techniques, apparatuses, and systems for connecting semiconductor dies through traces. A semiconductor assembly is described that includes two semiconductor dies. The first semiconductor die includes a first dielectric layer at which first circuitry is disposed. The second semiconductor die includes a second dielectric layer at which second circuitry is disposed. One or more traces extend from a side surface of the first dielectric layer and at a side surface of the second dielectric layer to electrically couple the first circuitry and the second circuitry. In doing so, rigid connective structures may not be needed to couple the first semiconductor die and the second semiconductor die.