Semiconductor Die Sidewall Connections via Gasket Cavities

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices with increasing complexity face challenges in die size limitations due to the need for numerous package to die connections, which can restrict miniaturization and functionality without compromising performance.

Innovation Solution

The formation of electrical connections through the sidewalls of semiconductor dies using metal tabs and conductive pillars, eliminating the need for bond pads by creating cavities in a surrounding gasket for pillar placement, allowing power and ground connections without increasing die size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If numerous bond pads are used to make package to die connections, then the number of connections increases, but the die size increases

Engineering Contradiction:
Improvenumber of package to die connectionsVSAvoiddie size
Core Design Contradiction:
Quantity of substanceVSArea of moving object

Solution Approach 1:

The patent transitions from planar bond pad connections on the die surface to three-dimensional sidewall connections. Metal tabs extend vertically from the die sidewalls, and conductive pillars connect these tabs to the package substrate, utilizing the vertical dimension to create connections without occupying additional die area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the connection function from the traditional bond pad location on the die surface and relocates it to the die sidewalls. This separation allows bond pads to be minimized or eliminated while maintaining the necessary package to die connections through the sidewall metal tabs and conductive pillars.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of moving object

If die size is reduced to lower cost, then manufacturing cost decreases, but the number of available bond pads is limited

Engineering Contradiction:
Improvedie sizeVSAvoidnumber of available bond pads
Core Design Contradiction:
Area of moving objectVSQuantity of substance

Solution Approach 1:

By moving connections to the sidewalls and utilizing vertical metal tabs, the patent enables multiple connections to be made in the vertical dimension rather than requiring proportional horizontal space. This allows small dies to have numerous connections without increasing die area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The connection structure is segmented into multiple vertical metal tabs along the die sidewall, each capable of independent connection. This segmentation allows the die to provide multiple connection points without increasing overall die size, as connections are distributed along the vertical sidewall surface.

Inventive Principle:
Principle #1Segmentation

3Power

If more power and ground connections are made, then power delivery performance improves, but die size increases

Engineering Contradiction:
Improvepower delivery performanceVSAvoiddie size
Core Design Contradiction:
PowerVSArea of moving object

Solution Approach 1:

Power and ground connections are established through vertical metal tabs and conductive pillars in the third dimension, allowing multiple power delivery paths without occupying additional planar die area. This enables enhanced power delivery performance while maintaining compact die size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10566268B1Package to die connection system and method therefor
Publication Date: 2020.02.18 CHIP PACKAGING TECH LLC
  • US10566268B1 patent drawing
  • US10566268B1 patent drawing
  • US10566268B1 patent drawing

AI summary

A package to die connection system and method are provided. The system includes a semiconductor device having a substrate with a top surface. A gasket is affixed to the top surface of the substrate and has at least one cavity with a portion of the cavity open to a sidewall of the gasket. A semiconductor die is attached to the top surface of the substrate. A sidewall of the semiconductor die is abutted with the sidewall of the gasket. A portion of a metal layer is exposed to the open portion of the cavity. A pillar located in the cavity is electrically connected to the exposed portion of the metal layer.