Semiconductor Die Stack Layout for Lower Package Height

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Solution Overview

Problem

The reduction of semiconductor die stacks' volume is limited by passive electrical components, such as capacitors, which occupy significant volume and restrict further height reduction.

Innovation Solution

Incorporating low-profile capacitors underneath the die stack and using encapsulant materials to support and stabilize the stack, allowing for reduced overall package height and footprint while maintaining structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If semiconductor die thickness is reduced to decrease stack height, then the height of the semiconductor die stack is reduced, but the overall package height cannot be reduced further because passive electrical components become the limiting factor

Engineering Contradiction:
Improvepackage heightVSAvoidcomponent arrangement complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent transitions passive electrical components from a vertical arrangement (stacked above the die) to a lateral arrangement (positioned beside the die on the same substrate plane). This dimensional change allows the components to no longer contribute to the package height, effectively resolving the height limitation while maintaining all necessary functional components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple semiconductor dies are stacked vertically to increase capacity, then the capacity and performance are improved, but the overall volume and height of the assembly increase

Engineering Contradiction:
Improvesemiconductor die capacityVSAvoidassembly volume
Core Design Contradiction:
Quantity of substanceVSVolume of stationary object

Solution Approach 1:

The patent merges the vertical stacking of semiconductor dies with the placement of passive electrical components on the same lateral plane. By combining these previously separate spatial arrangements into a unified two-dimensional layout, the design achieves high die capacity while preventing proportional increases in overall assembly volume.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If passive electrical components are positioned above the die stack, then electrical connections are simplified, but the package height increases and volume reduction is limited

Engineering Contradiction:
Improveelectrical connection simplicityVSAvoidpackage height
Core Design Contradiction:
Device complexityVSLength of stationary object

Solution Approach 1:

The patent repositions passive electrical components from the vertical dimension (above the die stack) to the lateral dimension (beside the die on the substrate). This spatial reconfiguration eliminates their contribution to package height while electrical connections are maintained through lateral routing on the substrate plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11942460B2Systems and methods for reducing the size of a semiconductor assembly
Publication Date: 2024.03.26 MICRON TECHNOLOGY INC
  • US11942460B2 patent drawing
  • US11942460B2 patent drawing
  • US11942460B2 patent drawing

AI summary

Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor device is an assembly that includes a package substrate having a front side and a backside opposite the front side. A controller die with a first longitudinal footprint can be attached to the front side of the package substrate. A passive electrical component is also attached to the front side of the package substrate. A stack of semiconductor dies can be attached to the controller die and the passive electrical component. The stack of semiconductor dies has a second longitudinal footprint greater than the first longitudinal footprint in at least one dimension. The controller die and the passive electrical component are positioned at least partially within the second longitudinal footprint, thereby at least partially supporting the stack of semiconductor dies.