Die Stack Bonding Structure With Through-Die Vias for Reliable Interconnects
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Solution Overview
Problem
Current semiconductor manufacturing methods face challenges in efficiently interconnecting semiconductor dies at the wafer level, particularly in achieving reliable and high-speed data transmission while minimizing thermal stress and manufacturing costs, due to limitations in existing bonding and packaging technologies.
Innovation Solution
The method involves forming through die vias that cross the semiconductor substrate and conductive pads to establish direct electrical connections between dies without the need for additional connectors like bumps, using a bonding layer to align and bond the dies, and employing a redistribution structure to enhance connectivity, thereby reducing thermal stress and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bonding methods with additional connectors (bumps) are used to interconnect semiconductor dies, then reliable electrical connections can be achieved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the bonding layer and conductive interconnection into a single integrated structure. The bonding layer itself is made conductive and directly connects the dies without requiring separate connector elements, thus eliminating additional components while maintaining reliable electrical connections.
Solution Approach 2:
The bonding layer serves multiple functions simultaneously: it provides mechanical bonding between dies, establishes electrical connections, and enables thermal management. This multi-functional approach eliminates the need for separate connector structures.
2Device complexity
If through die vias are formed to cross the semiconductor substrate for direct connections, then the number of manufacturing steps and process complexity increase, but the need for additional connectors is eliminated
Solution Approach 1:
The through die vias are formed preliminarily within the semiconductor substrate before the bonding process. This preliminary preparation allows the bonding layer to simply fill and connect to existing structures, simplifying the overall manufacturing sequence despite the added via formation step.
Solution Approach 2:
The bonding layer is nested within and around the through die vias, with the conductive material of the bonding layer filling the vias and extending to the die surfaces. This nested configuration integrates multiple functions into a single structural element.
3Speed
If conventional packaging technologies are used, then thermal stress management becomes difficult, but achieving high-speed data transmission is limited
Solution Approach 1:
The bonding layer acts as an intermediary structure that provides a low-thermal-resistance path between the dies and the substrate. This intermediary conductive pathway efficiently manages thermal stress while enabling high-speed data transmission through the same interconnection structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables reliable, high-speed interconnections between semiconductor dies with reduced power consumption and increased process yields, allowing for finer density of conductive lines and higher input/output ports, while lowering the temperature requirements for bonding and reducing the occurrence of cracks in porous materials.
Implementation Method 1
using a bonding layer to align and bond the dies
Data Source
AI summary
A semiconductor device includes a die stack and an encapsulant covering the die stack. The die stack includes a first die and a second die stacked upon one another, a bonding dielectric layer, and a through die via providing a vertical connection in the die stack. The first die includes a first substrate and a first conductive pad on the first substrate, and the second die includes a second substrate and a second conductive pad on the second substrate. The bonding dielectric layer interposed between the first substrate and the second substrate is in physical contact with at least one selected from the group of the first conductive pad and the second conductive pad. The through die via extends through the first conductive pad and the bonding dielectric layer and lands on the second pad.