3D Die Stack Package Structure for Wafer-Level Known Good Die Testing
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Solution Overview
Problem
The semiconductor industry faces challenges in the development of three-dimensional integrated circuits (3DICs) due to complexities in packaging and integration density, particularly in verifying the functionality and performance of individual dies within a wafer before singulation, which affects yield and cost.
Innovation Solution
A method for preparing and testing semiconductor dies involves forming conductive vias, bonding structures, and interconnects, followed by thinning and singulation, with the use of temporary carriers and bonding processes to create a stacked die structure, and incorporating testing structures for verification, including redistribution layers and probe testing to ensure only known good dies are used for further processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafer-level testing and verification are performed before singulation, then yield and productivity are improved, but device complexity and measurement difficulty increase
Solution Approach 1:
The patent implements preliminary testing and verification of semiconductor dies at the wafer level before singulation. Test structures are formed on the wafer, allowing functional verification of multiple dies simultaneously. This preliminary action identifies defective dies early, improving yield by preventing defective components from proceeding to subsequent packaging and assembly stages, while avoiding the complexity of testing individual dies after separation.
2Measurement precision
If multiple testing structures are incorporated for verification, then measurement precision and reliability improve, but device complexity increases
Solution Approach 1:
The patent employs universal test structures that can verify multiple parameters and functions across different die types and configurations. The same test structure design can be applied to various semiconductor devices, enabling comprehensive verification of electrical connections, signal integrity, and functional performance. This multi-functional approach achieves high measurement precision without proportionally increasing structural complexity, as the test structures serve multiple verification purposes simultaneously.
Data Source
AI summary
A package structure includes a first die, a die stack structure bonded to the first die, a support structure and an insulation structure. The support structure is disposed on the die stack structure, and a sidewall of the support structure is laterally shifted from a sidewall of the die stack structure. The insulation structure is disposed on the first die and laterally wraps around the die stack structure and the support structure.