Die Stopper Bump Layout for Precise Chip Leveling

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Solution Overview

Problem

Semiconductor die tilt during attachment to a substrate or package causes performance issues and increases manufacturing costs due to the need for additional calibration and realignment, particularly affecting devices with accelerometers and optical devices.

Innovation Solution

Incorporation of stopper bumps between the semiconductor die and the substrate or package to control the gap and tilt, using adhesive structures to adhere and constrain the semiconductor die, allowing for precise leveling and alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If semiconductor die is attached to substrate without stopper bumps, then attachment process is simple, but die tilt occurs causing performance issues and requiring additional calibration

Engineering Contradiction:
Improvedie alignment precisionVSAvoidattachment structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Stopper bumps are formed on the substrate before die attachment, establishing predetermined reference points that guide die placement and ensure proper alignment. This preliminary structuring eliminates the need for post-attachment calibration and prevents die tilt from occurring in the first place.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The stopper bumps act as intermediary elements between the substrate and the semiconductor die, providing a mechanical reference structure that mediates the alignment process. These bumps serve as physical guides that constrain die placement and maintain proper orientation without requiring complex alignment mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If additional calibration and realignment processes are performed after die attachment, then alignment precision can be improved, but manufacturing time and costs increase

Engineering Contradiction:
Improvedie alignment precisionVSAvoidmanufacturing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

By pre-forming stopper bumps on the substrate with precise dimensions and positions, the alignment reference structure is established before die attachment. This eliminates the need for post-attachment calibration processes, maintaining high precision while preserving manufacturing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The stopper bumps enable the attachment process to be self-aligning, where the die naturally positions itself relative to the predetermined bumps during placement. This self-service alignment mechanism eliminates the need for additional calibration steps, improving productivity without sacrificing precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12412863B2Die attached leveling control by metal stopper bumps
Publication Date: 2025.09.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12412863B2 patent drawing
  • US12412863B2 patent drawing
  • US12412863B2 patent drawing

AI summary

In some embodiments, the present disclosure relates to an integrated chip including a substrate and a first die disposed over the substrate. A first plurality of die stopper bumps are disposed along a backside of the first die. The first plurality of die stopper bumps directly contact the backside of the first die, and the first plurality of die stopper bumps are arranged as a plurality of groups of die stopper bumps. A plurality of adhesive structures are also present. Each of the plurality of adhesive structures surrounds a corresponding group of the plurality of groups of die stopper bumps.