Die Arrangement With Through-Carrier Contacts
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Solution Overview
Problem
In multi-chip packages, existing electrical connection schemes are inefficient and space-consuming, lacking a compact and effective method to connect multiple chips within a single package while ensuring reliable electrical contact.
Innovation Solution
A die arrangement featuring a carrier with strategically formed openings and electrically conductive contact structures that span across the carrier, allowing for efficient electrical connection between chips through insulated pathways, utilizing metal materials like copper or aluminum for the carrier and contact structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional electrical connection schemes are used in multi-chip packages, then electrical connections between chips can be established, but the connections are space-consuming and reduce packaging density
Solution Approach 1:
The patent transitions from planar electrical connections to three-dimensional vertical connections by forming conductive contact structures that extend through the carrier substrate. Multiple chips are stacked vertically with electrical contacts passing through intermediate carriers, enabling efficient inter-chip connectivity in the vertical dimension while minimizing horizontal packaging area.
Solution Approach 2:
The patent implements a nested structure where multiple chips and carriers are stacked vertically, with each carrier containing conductive contact structures that pass through it. The chips are positioned on opposite sides of carriers, creating a compact nested arrangement that maximizes packaging density while maintaining reliable electrical connections through the stacked configuration.
2Area of stationary object
If more chips are packed into a single package to increase density, then space requirements are reduced, but electrical connection complexity increases
Solution Approach 1:
The patent divides the multi-chip package into modular units consisting of carriers with integrated conductive contact structures. Each carrier acts as an independent module that can be manufactured separately and then stacked with other modules. This segmentation simplifies the overall electrical connection scheme by breaking down the complex inter-chip connectivity into manageable, repeating units.
Solution Approach 2:
The carrier substrate serves multiple functions: it provides mechanical support for the chips, acts as an insulating layer, contains the conductive contact structures for electrical connections, and enables vertical stacking. This multi-functionality reduces the need for separate components and simplifies the overall electrical connection scheme while accommodating multiple chips in a compact arrangement.
3Reliability
If conductive materials are used for electrical connections, then electrical conductivity is improved, but insulation between adjacent contacts becomes challenging
Solution Approach 1:
The patent applies different material properties to different regions: the carrier substrate uses electrically insulating materials in areas where electrical isolation is needed, while conductive materials are selectively applied to form contact structures only where electrical connections are required. This local differentiation of material properties ensures both good electrical conductivity where needed and proper insulation where required.
Solution Approach 2:
The carrier substrate acts as an intermediary insulating layer between adjacent conductive contact structures. The substrate material electrically isolates neighboring contacts while still allowing the conductive structures to pass through it vertically. This intermediary layer prevents electrical interference between adjacent contacts while maintaining the conductivity of the contact structures themselves.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables compact, efficient, and reliable electrical connections between chips, enhancing the packaging density and reducing space requirements while maintaining insulation for improved performance.
Implementation Method 1
electrically conductive contact structures that span across the carrier, allowing for efficient electrical connection between chips
Data Source
AI summary
A die arrangement includes a carrier having a first side and a second side opposite the first side, the carrier including an opening leading from the first side of the carrier to the second side of the carrier; a first die disposed over the first side of the carrier and electrically contacting the carrier; a second die disposed over the second side of the carrier and electrically contacting the carrier; and an electrical contact structure leading through the opening in the carrier and electrically contacting the second die.