Die-to-Die Communication Network in Stacked Microelectronic Assemblies
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Solution Overview
Problem
Conventional microelectronic assemblies face challenges in efficiently communicating large numbers of signals between multiple integrated circuit (IC) dies due to their small size, thermal constraints, and power delivery limitations, which restricts design flexibility and increases costs.
Innovation Solution
The proposed microelectronic assemblies incorporate a package substrate with interconnects that allow direct coupling between dies, enabling a communication network within the substrate, which includes die-to-package substrate interconnects and die-to-die interconnects, facilitating improved power delivery and signal speed while reducing package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional substrates are used to couple IC dies, then mechanical stability is achieved, but interconnect pitch is constrained by manufacturing, materials, and thermal considerations
Solution Approach 1:
The system segments the interconnect function across multiple layers: package substrate interconnects, overmold interconnects, and die-to-die interconnects. This segmentation allows each layer to be optimized independently, enabling finer interconnect pitch than conventional single-layer substrates can achieve.
Solution Approach 2:
The patent transitions from planar 2D interconnect routing to 3D multi-layer routing by embedding conductive pathways within the overmold material and utilizing vertical stacking of dies. This dimensional change enables higher density interconnects without increasing package footprint.
2Volume of stationary object
If direct die coupling is implemented, then package size is reduced, but thermal management becomes more challenging
Solution Approach 1:
The overmold material serves as an intermediary that provides both mechanical coupling and thermal management. It fills the space between dies, enabling direct coupling while incorporating thermal vias and conductive pathways to dissipate heat effectively in the compact package structure.
Solution Approach 2:
The system uses composite materials including the overmold material with embedded conductive pathways, and materials with tailored thermal conductivity. This allows the package to achieve small size while maintaining effective heat dissipation through the multi-material construction.
3Productivity
If more interconnects are added to increase bandwidth, then power delivery limitations are exceeded
Solution Approach 1:
The interconnect system is segmented into different functional layers: power delivery interconnects, signal transmission interconnects, and ground references. This segmentation allows optimized power distribution separate from high-speed signal paths, enabling higher bandwidth without exceeding power delivery limitations.
Solution Approach 2:
The patent replaces conventional electrical power delivery through substrate traces with direct die-to-die bonding and embedded conductive pathways in the overmold. This substitution reduces resistive losses and improves power delivery efficiency to support higher bandwidth operations.
Data Source
AI summary
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.