Spin-On Dielectric Sealing of Air Spacers for Uniform Gate Isolation
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in forming air spacers with low dielectric constant materials, such as those deposited by atomic layer deposition (ALD) and chemical vapor deposition (CVD), which often result in seams, non-planar surfaces, and inconsistent dimensions, affecting transistor performance and complexity.
Innovation Solution
The use of a spin-on dielectric structure to seal an air gap between the gate and source/drain contact structures, which provides a seamless, planarized surface and controlled dimensions, reducing capacitance and improving transistor speed by forming air spacers with a low dielectric constant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air spacers are formed using ALD or CVD processes, then dielectric material is deposited to reduce capacitance, but seams and non-planar surfaces are created affecting transistor performance
Solution Approach 1:
A spin-on dielectric layer is introduced as an intermediary material between the air gap and the surrounding structures. This layer fills the air gap conformally and is then planarized, providing a seamless, planar surface that eliminates the defects associated with direct ALD/CVD air spacer formation while maintaining the low-capacitance benefit
Solution Approach 2:
The dielectric constant parameter is strategically varied: air (k≈1) is used in the spacer region to reduce capacitance, while a spin-on dielectric material with higher dielectric constant is used to seal and planarize the structure. This parameter change allows simultaneous achievement of low capacitance and manufacturing precision
2Speed
If air spacers are formed to reduce dielectric capacitance, then transistor speed is improved, but seams and non-planar surfaces increase process complexity
Solution Approach 1:
The spin-on dielectric layer serves as a mediator that simplifies subsequent processing. By providing a planar, seamless surface, it eliminates the need for complex repair or adjustment processes that would be required to handle the seams and non-planar surfaces created by direct air spacer formation
Solution Approach 2:
The spin-on dielectric layer is applied in advance to seal and planarize the air gap structure before subsequent manufacturing steps. This preliminary action prevents the formation of defects and simplifies all downstream processes, reducing overall device complexity
3Manufacturing precision
If spin-on dielectric material is used to seal air gap, then seamless planarized surface is achieved, but additional processing steps are required
Solution Approach 1:
The spin-on dielectric process is self-aligning and self-planarizing. The material automatically conforms to the air gap geometry and then undergoes planarization that creates a perfectly flat surface without requiring additional alignment or finishing steps, making the added processing time worthwhile
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The spin-on dielectric structure effectively reduces the dielectric capacitance between the gate and source/drain contact structures, enhancing transistor speed and simplifying subsequent polishing processes by providing consistent and uniform air spacer dimensions across multiple transistors.
Implementation Method 1
a spin-on dielectric structure is formed by applying and treating a spin-on dielectric material
Data Source
AI summary
The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.