Dielectric Anchors for Conductive Pillar Isolation and Support

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Solution Overview

Problem

Three-dimensional (3D) integration techniques face challenges in maintaining structural integrity of conductive pillars due to air trenches, leading to potential failure during fabrication and consumer use, which affects the yield and performance of integrated chips (ICs).

Innovation Solution

A conductive pillar anchored to a semiconductor substrate via a dielectric anchor, with an isolation region and dielectric anchor providing both electrical isolation and structural support, preventing cracking or dislodging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If air trenches are used for electrical isolation of conductive pillars, then electrical isolation is improved, but structural integrity deteriorates

Engineering Contradiction:
Improveelectrical isolationVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

A dielectric anchor structure is introduced as an intermediary element between the conductive pillar and the semiconductor substrate. This anchor provides mechanical support and anchors the conductive pillar to the substrate, compensating for the structural weakness created by air trenches while maintaining the electrical isolation function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution employs a composite structure combining dielectric materials with different mechanical and electrical properties. The dielectric anchor uses materials that provide both electrical isolation and enhanced mechanical strength, creating a composite system that simultaneously addresses both electrical isolation and structural integrity requirements.

Inventive Principle:
Principle #40Composite materials

2Productivity

If conductive pillars are made thinner for higher density, then integration density is improved, but mechanical strength deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidmechanical strength
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The solution transitions from relying solely on the vertical strength of thin conductive pillars to a distributed anchoring system. Dielectric anchors are positioned at multiple locations around the pillar, distributing mechanical loads across multiple attachment points. This dimensional distribution of support points enables thinner pillars to achieve sufficient mechanical strength through strategic placement of support elements in the lateral dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The dielectric anchors are formed prior to conducting stress tests and final assembly. This preliminary anchoring ensures that conductive pillars are mechanically secured before they undergo fabrication processes that may subject them to stress, preventing dislodging or cracking during manufacturing and enabling the use of thinner, higher-density pillar configurations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12170243B2Dielectric anchors for anchoring a conductive pillar
Publication Date: 2024.12.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12170243B2 patent drawing
  • US12170243B2 patent drawing
  • US12170243B2 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an apparatus comprising a semiconductor substrate. A conductive pillar is disposed in the semiconductor substrate. An isolation region is disposed in the semiconductor substrate and extends laterally around the conductive pillar. The isolation region is configured to electrically isolate the conductive pillar from a surrounding portion of the semiconductor substrate. An opening is disposed in the isolation region. A dielectric anchor is disposed in the isolation region. The dielectric anchor extends vertically through the semiconductor substrate along a side of the opening. The dielectric anchor anchors the conductive pillar to the semiconductor substrate.