Dielectric Layer Baking to Remove Plasma-Induced Particle Accumulation

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Solution Overview

Problem

The increasing integration of semiconductor devices leads to insufficient wafer area for interconnects, resulting in particle accumulation during plasma processes, which affects the electrical performance and reliability of semiconductor devices.

Innovation Solution

Implementing a baking process after plasma deposition or etching processes to remove accumulated ions and particles, using inert gases like helium or neon at 380-450°C for 1-20 minutes, to reduce surface voltage and improve dielectric properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If plasma process is performed to form dielectric layer, then dielectric layer is formed successfully, but particles accumulate on the dielectric layer affecting electrical performance

Engineering Contradiction:
Improvedielectric layer qualityVSAvoidparticle accumulation
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A baking process is performed after plasma deposition to proactively remove particles before they cause electrical performance degradation. This preliminary cleaning action prevents the harmful effect of particle accumulation rather than addressing it after damage occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The plasma process that deposits dielectric material also generates particle contamination. The invention converts this harmful byproduct into a manageable condition by introducing a controlled baking process that removes particles, effectively transforming the plasma process's harmful effect into an opportunity for enhanced cleaning.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Adaptability or versatility

If plasma process is interrupted, then process flexibility is improved, but particles accumulate on dielectric layer decreasing yield and reliability

Engineering Contradiction:
Improveprocess interruption flexibilityVSAvoiddevice yield and reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The baking process is performed as a standard step after plasma deposition, even before knowing if interruption will occur. This preliminary action ensures particles are removed regardless of whether the process is interrupted, maintaining reliability while preserving process flexibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The baking process acts as a cushioning measure against the potential harm of process interruption. By performing baking beforehand, the system prepares a protective measure that mitigates the reliability damage that would otherwise result from interruption-induced particle accumulation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Object-affected harmful factors

If baking process is performed after plasma process interruption, then particle removal is achieved, but additional process time is required

Engineering Contradiction:
Improveparticle accumulationVSAvoidmanufacturing cycle time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The baking process is merged into the standard manufacturing flow as a routine step following plasma deposition, rather than as a separate corrective action. This integration allows particle removal to occur as part of the normal process sequence, minimizing additional time investment.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The baking process enhances the yield and reliability of semiconductor devices by reducing particle accumulation and surface voltage, and can be integrated into standard manufacturing to improve dielectric material properties.

Implementation Method 1

A first baking process is performed. The aforementioned first baking process is performed under a temperature of about 380 ̃450 centigrade.

Methodology Applied
Scientific EffectThermal heating: Heating

Implementation Method 2

A plasma vapor deposition process is performed to form a dielectric layer over the substrate. The aforementioned plasma vapor deposition process is selected from a group consisting of a plasma enhanced chemical vapor deposition process and a high density plasma chemical vapor deposition.

Methodology Applied
Scientific EffectPlasma enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 3

A plasma etching process is performed to pattern the dielectric layer to form an opening in the dielectric layer.

Methodology Applied
Scientific EffectPlasma etching: Plasma

Data Source

PatentUS7510964B2Method for manufacturing semiconductor device that includes baking a dielectric layer after exposure to plasma
Publication Date: 2009.03.31 UNITED MICROELECTRONICS CORP
  • US7510964B2 patent drawing
  • US7510964B2 patent drawing
  • US7510964B2 patent drawing

AI summary

The invention is directed to a method for manufacturing semiconductor device. The method comprises steps of providing a substrate and then forming a dielectric material-containing device over the substrate. A plasma vapor deposition process is performed to form a dielectric layer over the substrate. A first baking process is performed.