Dielectric Blocking Layer for Fine-Pitch Solder Bridging Prevention

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Solution Overview

Problem

The reduction in pitch of metal bumps during the formation of integrated circuits leads to increased likelihood of solder bridging between neighboring bumps, posing a challenge in packaging processes.

Innovation Solution

A method involving the formation of a recess in a photo-sensitive polymer layer over metal bumps to house solder regions, preventing bridging by aligning and confining the solder within these recesses, which are created through a photolithography process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the pitch of metal bumps is reduced to increase integration density, then the area occupied by bumps decreases, but the likelihood of solder bridging between neighboring bumps increases

Engineering Contradiction:
Improvearea occupied by metal bumpsVSAvoidrisk of solder bridging
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent introduces a dielectric blocking layer that segments the solder regions, physically separating adjacent solder blobs that form on metal bumps. This segmentation prevents solder from flowing between neighboring bumps during the bonding process, thereby eliminating bridging risks even when bumps are closely spaced at reduced pitches

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric blocking layer acts as an intermediary barrier between adjacent metal bumps. This intermediate structure prevents direct contact between solder regions, mediating the interaction between neighboring bumps and preventing harmful solder bridging while allowing the bumps to maintain reduced pitch spacing

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the pitch of metal bumps is reduced to enhance packaging density, then more bumps can be accommodated on the wafer, but the manufacturing precision required to prevent solder bridging increases

Engineering Contradiction:
Improvepackaging densityVSAvoidprecision required to prevent solder bridging
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The dielectric blocking layer is formed in advance before the soldering process. This preliminary action creates pre-defined separation barriers that guide solder flow and prevent bridging without requiring high precision during the actual soldering operation. The blocking layer is formed using standard photolithography and etching processes, making the solution manufacturable with conventional precision levels

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric blocking layer automatically performs the function of preventing solder bridging through its physical presence and geometric configuration. The structure self-regulates solder flow by providing inherent barriers, eliminating the need for complex precision control mechanisms during the soldering process and enabling high-density packaging with standard manufacturing capabilities

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents solder bridging by aligning and confining solder regions, allowing for smaller pitch designs without the risk of electrical connections shorting, thus enhancing packaging reliability and efficiency.

Implementation Method 1

A method involves the formation of a recess in a photo-sensitive polymer layer over metal bumps to house solder regions

Methodology Applied
Scientific EffectPhotolithography: Photopolymerisation

Data Source

PatentUS20250336867A1Dielectric blocking layer and method forming the same
Publication Date: 2025.10.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250336867A1 patent drawing
  • US20250336867A1 patent drawing
  • US20250336867A1 patent drawing

AI summary

A method includes forming a first package component, which comprises forming a first dielectric layer having a first top surface, and forming a first conductive feature. The first conductive feature includes a via embedded in the first dielectric layer, and a metal bump having a second top surface higher than the first top surface of the first dielectric layer. The method further includes dispensing a photo-sensitive layer, with the photo-sensitive layer covering the metal bump, and performing a photolithography process to form a recess in the photo-sensitive layer. The metal bump is exposed to the recess, and the photo-sensitive layer has a third top surface higher than the metal bump. A second package component is bonded to the first package component, and a solder region extends into the recess to bond the metal bump to a second conductive feature in the second package component.