Dielectric Cap Layer Formation for Replacement Gate Structures
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Solution Overview
Problem
Current methods for forming dielectric cap layers on replacement metal gates face challenges such as degradation of metal gate electrodes during high-temperature annealing and compatibility issues with complex metal compositions, leading to inadequate cap layer thickness and thermal/oxygen control problems, especially at 14 nm technology nodes.
Innovation Solution
A method involving the formation of a replaced gate structure with interlayer dielectric, metals like TiN and aluminum, and subsequent planarization, etching, and filling with dielectric materials like aluminum oxide to create a thick dielectric cap layer with controlled thickness and shape, avoiding thermal and oxygen concerns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional oxidation, nitridation, or fluorination processes are used to form a dielectric cap layer, then the metal gate electrode can be protected, but the cap layer thickness is insufficient (less than 15 nm) and the process is incompatible with complex metal compositions
Solution Approach 1:
The patent introduces an intermediary material layer (such as silicon nitride or silicon oxide) deposited by CVD or ALD as a mediator between the complex metal gate electrode and the final dielectric cap structure. This intermediary layer serves as a foundation that enables subsequent formation of sufficiently thick dielectric cap layers (at least 15 nm) through conformal deposition processes, resolving the thickness limitation of direct oxidation/nitridation/florination methods while maintaining compatibility with complex metal compositions.
2Ease of manufacture
If direct oxidation, nitridation, or fluorination is performed on the top metal surface, then the process is simple, but it necessitates a single type of metal and conflicts with high-k/metal gate stack requirements
Solution Approach 1:
The patent segments the cap layer formation process into multiple distinct stages: first forming an intermediary material layer through CVD or ALD deposition, then subsequently forming the dielectric cap layer material. This segmentation allows each stage to be optimized independently - the intermediary layer stage handles metal composition compatibility, while the cap layer stage achieves required thickness and dielectric properties, thereby resolving the conflict between process simplicity and metal composition versatility.
3Reliability
If a thick dielectric cap layer (at least 15 nm) is required for subsequent processes, then the cap layer provides sufficient isolation, but conventional oxidation, nitridation, and fluorination processes cannot achieve this thickness
Solution Approach 1:
The patent changes the fundamental parameter of cap layer formation from in-situ oxidation/nitridation/florination (which are limited to thin layers) to conformal deposition processes such as CVD or ALD. These deposition processes can be controlled to achieve precise thicknesses of at least 15 nm with excellent uniformity and conformality, thereby resolving the thickness control issue while providing sufficient gate isolation for subsequent self-aligned contact processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of a robust dielectric cap layer that allows for self-aligned contacts, preventing gate-to-contact shorts and improving transistor performance by isolating gate metals, while accommodating stringent dimensions and integration requirements.
Implementation Method 1
forming an oxide on the second metal; removing the oxide
Data Source
AI summary
Gate to contact shorts are reduced by forming dielectric caps in replaced gate structures. Embodiments include forming a replaced gate structure on a substrate, the replaced gate structure including an ILD having a cavity, a first metal on a top surface of the ILD and lining the cavity, and a second metal on the first metal and filling the cavity, planarizing the first and second metals, forming an oxide on the second metal, removing the oxide, recessing the first and second metals in the cavity, forming a recess, and filling the recess with a dielectric material. Embodiments further include dielectric caps having vertical sidewalls, a trapezoidal shape, a T-shape, or a Y-shape.