Dielectric Caps for Interconnect Overlay Margin
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Solution Overview
Problem
As semiconductor devices require increasingly smaller interconnect pitches, aligning vias with interconnect layers becomes challenging, leading to potential short circuits and reduced yield due to manufacturing variations, and reducing via size increases resistance.
Innovation Solution
The implementation of an interconnect structure with first and second dielectric caps formed above a hardmask layer using a directed self-assembly process, allowing for wider contact formation and greater alignment error margins through etch selectivities between caps and an etchstop liner.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If via size is reduced to accommodate smaller interconnect pitches, then alignment margin is improved, but resistance increases and manufacturing yield decreases
Solution Approach 1:
The patent introduces dielectric caps that extend the via structure laterally beyond the interconnect pitch, creating an overlay structure in a new dimensional space. This allows the via to be physically larger while maintaining precise alignment through the cap geometry, thereby improving both alignment margin and manufacturing yield simultaneously
Solution Approach 2:
The dielectric cap acts as an intermediary element between the via and the overlying interconnect layer. It provides a larger alignment target area while the underlying via maintains its electrical function, thus improving alignment tolerance without increasing resistance
2Manufacturing precision
If via size is reduced to accommodate smaller interconnect pitches, then alignment margin is improved, but resistance increases
Solution Approach 1:
By extending the via structure laterally through dielectric caps, the invention creates a three-dimensional overlay that increases the effective via width without increasing the vertical electrical path length, thus improving alignment margin while maintaining low resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise alignment and contact formation with tightly pitched interconnect lines, reducing the risk of short circuits and improving manufacturing yield by allowing for larger contact widths and increased alignment tolerance.
Implementation Method 1
allowing for wider contact formation and greater alignment error margins through etch selectivities between caps and an etchstop liner
Data Source
AI summary
Embodiments of the invention include an interconnect structure and methods of forming such structures. In an embodiment, the interconnect structure may include an interlayer dielectric (ILD) with a first hardmask layer over a top surface of the ILD. Certain embodiments include one or more first interconnect lines in the ILD and a first dielectric cap positioned above each of the first interconnect lines. For example a surface of the first dielectric cap may contact a top surface of the first hardmask layer. Embodiments may also include one or more second interconnect lines in the ILD arranged in an alternating pattern with the first inter-connect lines. In an embodiment, a second dielectric cap is formed over a top surface of each of the second interconnect lines. For example, a surface of the second dielectric cap contacts a top surface of the first hardmask layer.