Dielectric Cavity RDL Layout for Dual-Sided Embedded Connections
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Solution Overview
Problem
High-speed semiconductor packaging faces challenges in integrating optical and electrical components, particularly in achieving 2-sided connections for embedded components within a dielectric cavity, which is essential for high-speed signaling and optical communication.
Innovation Solution
The implementation of an open cavity architecture with redistribution layers (RDL) in a dielectric cavity, using a thick seed layer as a laser stop to create a dielectric cavity, and patterning RDLs on both surfaces to enable 2-sided connections for embedded components like photonic devices and silicon bridges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an open cavity architecture is used to embed optical components, then the integration of photonic devices is enabled, but achieving reliable 2-sided connections becomes technically challenging
Solution Approach 1:
The patent transitions from planar 2D connections to 3D spatial connections by routing signals through the thickness of the substrate. Through-silicon vias (TSVs) enable vertical interconnections that pass through multiple layers and cavities, allowing embedded optical components to connect to both upper and lower surfaces simultaneously, thus achieving reliable 2-sided connections in three-dimensional space
Solution Approach 2:
The patent embeds optical components within cavities formed in the substrate, nesting these components inside the three-dimensional structure. The cavities are positioned at specific depths within the substrate thickness, allowing multiple functional layers to be stacked vertically. This nested arrangement enables compact integration while maintaining connection pathways to both surfaces of the package
2Ease of manufacture
If existing semiconductor packaging processes are used, then manufacturing simplicity is maintained, but they cannot support high-speed optical signaling requirements
Solution Approach 1:
The patent modifies existing semiconductor packaging parameters by introducing new material compositions, cavity depth specifications, via dimensions, and interconnect geometries optimized for optical signal transmission. These parameter changes enable high-speed optical signaling while building upon established manufacturing capabilities, allowing incremental process evolution rather than complete process redesign
3Productivity
If embedded components are integrated to achieve high bandwidth, then signaling performance improves, but the technical complexity of integration increases
Solution Approach 1:
The patent divides the integrated circuit into separate functional segments: electronic circuitry on one die, optical components in embedded cavities, and interconnect structures linking them. This segmentation allows each component to be optimized independently for its specific function while simplifying the overall integration process, as standardized interfaces and interconnect structures can be used to link the segmented components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for minimal disruption to existing processes and enables reliable dual-sided connections, supporting high-speed signaling and optical communication by facilitating the integration of photonic devices and other embedded components within semiconductor packages.
Implementation Method 1
using a thick seed layer as a laser stop to create a dielectric cavity
Data Source
AI summary
Architectures and processes for redistribution layers in a dielectric cavity to enable an embedded component in semiconductor packaging. The architectures pattern redistribution layers (RDL) over a thick seed and remove dielectric material from the RDL conductive contacts to create the dielectric cavity. The architectures enable 2-sided connections for embedded components in the dielectric cavity with minimal disruption to existing process infrastructure. Such an approach can be used not only for integration of photonic devices, but also for any semiconductor packaging requiring dual sided connection within a dielectric cavity.