Dielectric Layer Deposition RF Power Segmentation

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Solution Overview

Problem

Conventional semiconductor devices with multi-layered interconnects often suffer from inferior electrical properties due to the formation of bump defects and abnormal electrical properties in the interconnect structures, which can lead to bridges between adjacent metal layers, caused by non-uniform nucleation rates during the deposition of dielectric layers.

Innovation Solution

A method is introduced where a dielectric layer is formed using reactant gases including a silicon-source gas and an oxygen-source gas under RF power, with the deposition time divided into three segments: an initial stage with low RF power to control nucleation rates, a second stage with increasing RF power for uniform growth, and a third stage maintaining the higher power, along with the introduction of a non-oxidative diluent gas to ensure uniform nucleation and a subsequent oxygen plasma treatment to remove silicon-source residue.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional deposition process with constant high RF power is used to form dielectric layer, then deposition efficiency is improved, but non-uniform nucleation occurs causing bump defects and inferior electrical properties

Engineering Contradiction:
Improvedeposition efficiencyVSAvoidnucleation uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The deposition process is segmented into three distinct stages with different RF power levels: initial stage (low power for uniform nucleation), middle stage (increasing power for controlled growth), and final stage (high power for efficient completion). This segmentation allows each stage to optimize for its specific function, resolving the contradiction between deposition efficiency and nucleation uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The RF power is dynamically adjusted throughout the deposition process rather than remaining constant. The power level transitions from low to high in a controlled manner, enabling the system to adapt to the changing requirements of the deposition process at different time points, thereby achieving both uniform nucleation and high deposition efficiency.

Inventive Principle:
Principle #15Dynamics

2Speed

If high RF power is applied throughout deposition, then deposition speed is improved, but bump defects form reducing device reliability

Engineering Contradiction:
Improvedeposition speedVSAvoiddevice electrical properties
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The initial stage of deposition is performed at low RF power to establish uniform nucleation before the main deposition proceeds at high power. This preliminary action prevents the formation of bump defects that would otherwise occur if high power were applied from the beginning, ensuring both high deposition speed and device reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The deposition process employs periodic variation of RF power levels rather than a constant value. The power is cycled through different stages (low-initial, medium-middle, high-final), allowing the system to maintain high overall deposition speed while periodically reducing power to prevent defect formation during critical nucleation phases.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the formation of bump defects, enhances the flatness of the dielectric layer, and improves the electrical properties of semiconductor devices by ensuring uniform nucleation and growth, preventing abnormal electrical properties and bridges between metal layers.

Implementation Method 1

forming a dielectric layer on the substrate by a deposition process using reactant gases. The reactant gases include a silicon-source gas and an oxygen-source gas under a radio-frequency (RF) power

Methodology Applied
Scientific EffectPlasma enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 2

The RF power of the deposition process in the first time length is a first power, the first power gradually increases from the first power to a second power in the second time length

Methodology Applied
Scientific EffectNucleation: Nucleation

Data Source

PatentUS9524865B2Semiconductor device and fabrication method thereof
Publication Date: 2016.12.20 SEMICON MFG INT (BEIJING) CORP
  • US9524865B2 patent drawing
  • US9524865B2 patent drawing
  • US9524865B2 patent drawing

AI summary

The present disclosure provides a method for forming a semiconductor device. The method includes providing a substrate and forming a dielectric layer on the substrate by a deposition process using reactant gases. The reactant gases include a silicon-source gas and an oxygen-source gas under a radio-frequency (RF) power. The deposition process performed for a total deposition time to form the dielectric layer is divided into a first time length, a second time length and a third time length. The RF power of the deposition process in the first time length is a first power, the first power gradually increases from the first power to a second power in the second time length, the RF power in the third time length is the second power, and the first power is less than the second power.