Dielectric Dummy Gate Structure for Reliable GAA Fabrication
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Solution Overview
Problem
The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the complexity of fabrication processes in the scaling-down process of FinFETs, particularly in creating gate all around (GAA) transistor structures.
Innovation Solution
A semiconductor device structure is developed with a dielectric dummy gate wrapped around the width-transition portion of the fin, which aids in patterning the GAA transistor structure using photolithography and self-aligned processes, enhancing the reliability and efficiency of the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs lower, but fabrication process complexity increases and manufacturing reliability decreases
Solution Approach 1:
The dielectric dummy gate is formed in advance before the final gate structure, serving as a protective placeholder during subsequent etching operations. This preliminary structure prevents accidental etching of critical components like the thin inner spacer layer, thereby maintaining manufacturing reliability even as feature sizes decrease and process complexity increases
2Reliability
If gate all around (GAA) transistor structure is implemented to improve FinFET operation, then gate control efficiency increases, but fabrication process complexity increases
Solution Approach 1:
The fabrication process is divided into distinct stages with the dielectric dummy gate formed as an intermediate step. This segmentation allows the complex GAA structure to be built systematically, with the dummy gate providing a reference framework that simplifies the formation of multiple gate wraps around the fin, thereby reducing the overall complexity of implementing the GAA transistor structure
3Ease of manufacture
If etching process is used to remove gate stacks, then GAA transistor structure is formed, but critical components like thin inner spacer layer may be damaged
Solution Approach 1:
The dielectric dummy gate acts as an intermediary protective element between the etching process and the thin inner spacer layer. During the etching of gate stacks, the dummy gate physically blocks the etchant from reaching and damaging the spacer layer, enabling the etching process to proceed while preserving critical components and maintaining manufacturing precision
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a fin over the base. The fin has a wide portion and a width-transition portion. The width-transition portion tapers away from the wide portion in a top view of the substrate, and a first top surface of the wide portion is higher than a second top surface of the width-transition portion. The semiconductor device structure includes a gate stack wrapped around the wide portion. The semiconductor device structure includes a dielectric dummy gate wrapped around the width-transition portion.