Dielectric Fin Capping to Prevent GAA Gate Contact Shorting

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Solution Overview

Problem

The increasing aspect ratio of dielectric fins in gate-all-around (GAA) transistors leads to seam formation and bridging risks between source/drain contact and metal gate, causing device failure.

Innovation Solution

A dielectric cap is formed within the top gap of the seam and the height of the dielectric fin is reduced to prevent shorting between source/drain contact and the metal gate, while maintaining the integrity of the dielectric fin structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the aspect ratio of dielectric fins is increased to improve integration density, then more components can be integrated into a given area, but seam formation and bridging risks between source/drain contact and metal gate occur, causing device failure

Engineering Contradiction:
Improveintegration densityVSAvoiddevice reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A dielectric cap is formed over the dielectric fin at a first stage of fabrication, before the high-aspect-ratio problems occur. This preliminary protective structure prevents seam formation and bridging during subsequent etching processes, allowing the dielectric fin to achieve high aspect ratio without compromising device reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric cap acts as a protective cushion that prevents harmful effects (seam formation and bridging) before they can occur. By placing this protective layer beforehand, the patent eliminates the risk of device failure that would otherwise result from the high aspect ratio of the dielectric fin

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Strength

If the height of the dielectric fin is increased to maintain structural integrity, then the dielectric fin can support higher aspect ratios, but seam enlargement during etching processes occurs, leading to shorting risks

Engineering Contradiction:
Improvestructural integrityVSAvoidseam precision
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The dielectric cap serves as an intermediary protective structure between the etching process and the dielectric fin. It mediates the interaction by absorbing or preventing the harmful effects of etching on the dielectric fin, thereby maintaining both the structural integrity and manufacturing precision of the fin structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric cap is formed in advance before etching operations, preliminarily protecting the dielectric fin from seam enlargement. This preliminary action ensures that subsequent etching processes do not compromise the precision of the dielectric fin structure

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12464750B2Semiconductor device and formation method thereof
Publication Date: 2025.11.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12464750B2 patent drawing
  • US12464750B2 patent drawing
  • US12464750B2 patent drawing

AI summary

A method of forming a semiconductor device includes etching trenches in a substrate to form semiconductor fins, filling a first one of the trenches with a dielectric fin, forming an insulation material in a second one of the trenches, performing a first recessing process to recess the insulation material and form a gap on a top of the dielectric fin, filling the gap with a dielectric cap, and forming a gate stack across the semiconductor fins and the dielectric fin.