Composite Dielectric Fin Isolation for FinFET Etch Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices continue to integrate more components into a given area through reduced minimum feature sizes, challenges arise in maintaining the integrity and reliability of transistor isolation regions, particularly in FinFETs, due to issues like coalescing of epitaxial source/drain regions and defects during etching processes.

Innovation Solution

The formation of dielectric fins using ceramic dielectric materials between epitaxial source/drain regions in FinFETs, which act as additional isolation regions, enhances mechanical strength, reduces CMP loading, and improves etching selectivity, thereby minimizing defects and coalescing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If traditional isolation regions are used in FinFETs, then manufacturing process is simpler, but mechanical strength is insufficient and defects occur during etching

Engineering Contradiction:
Improvemechanical strengthVSAvoidisolation region structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The isolation region employs a composite structure consisting of a first dielectric material layer and a second dielectric material layer with different etch selectivity. This composite structure provides enhanced mechanical strength while maintaining manufacturability through selective etching processes.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The isolation region is divided into multiple layers with distinct dielectric materials. The first dielectric material layer and second dielectric material layer are segmented to provide different functional properties, including mechanical support and etch selectivity, resolving the contradiction between strength and complexity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If minimum feature sizes are reduced to increase integration density, then more components can be integrated, but isolation region integrity deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidisolation region integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The multi-layer dielectric structure provides enhanced mechanical integrity at reduced feature sizes. The combination of first and second dielectric materials with different etch selectivity maintains isolation region stability even as minimum feature sizes are reduced to increase integration density.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

Different regions of the isolation structure use different dielectric materials optimized for specific functions. The first dielectric material provides mechanical strength while the second dielectric material provides etch selectivity, allowing the isolation region to maintain integrity at smaller dimensions.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If ceramic dielectric fins are added as additional isolation regions, then mechanical strength and etching selectivity improve, but manufacturing complexity increases

Engineering Contradiction:
Improveetching selectivityVSAvoidisolation region structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The second dielectric material layer is specifically positioned within the isolation region to provide localized etch selectivity. This targeted approach improves manufacturing precision for fin formation while adding minimal structural complexity compared to a uniform isolation structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The multi-layer dielectric structure is prepared in advance before fin etching. The first and second dielectric materials are deposited and patterned beforehand to provide the necessary mechanical strength and etch selectivity, simplifying the subsequent fin formation process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250351543A1Transistor isolation regions
Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250351543A1 patent drawing
  • US20250351543A1 patent drawing
  • US20250351543A1 patent drawing

AI summary

In an embodiment, a device includes: an isolation region on a substrate; a first semiconductor fin protruding above the isolation region; a second semiconductor fin protruding above the isolation region; and a dielectric fin between the first semiconductor fin and the second semiconductor fin, the dielectric fin protruding above the isolation region, the dielectric fin including: a first layer including a first dielectric material having a first carbon concentration; and a second layer on the first layer, the second layer including a second dielectric material having a second carbon concentration, the second carbon concentration greater than the first carbon concentration.