Dielectric Fin Structure Seam Elimination for Etch Resistance

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Solution Overview

Problem

Existing semiconductor manufacturing processes face challenges in forming seamless dielectric fin structures, which leads to reduced etch resistance, increased device defects, and failures such as bridging between epitaxial structures and cut gate failures.

Innovation Solution

A method involving the deposition of a dielectric fin structure between semiconductor fin structures, followed by etching back and an implantation process that breaks bonds and causes re-bonding within the dielectric fin structure, eliminating seams and enhancing etch resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dielectric fin structure is deposited between semiconductor fin structures, then the structure provides isolation and support, but seams form in the dielectric fill material which reduce etch resistance and cause device defects

Engineering Contradiction:
Improveetch resistanceVSAvoidseam formation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An implantation process is performed on the dielectric fill material before subsequent etching steps to pre-treat the material and eliminate seams. This preliminary action modifies the dielectric fin structure to improve etch resistance and prevent seam-related defects before they can cause problems in later manufacturing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The implantation process changes the physical and chemical parameters of the dielectric fill material by introducing implanted species that modify the material properties. This parameter change eliminates seams and enhances etch resistance, transforming the dielectric fin structure from a defect-prone state to a reliable state.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If the dielectric fin structure is etched back to expose fins, then subsequent processing is enabled, but seams in the dielectric material lead to bridging between epitaxial structures

Engineering Contradiction:
Improveprocessing accessibilityVSAvoidbridging prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The implantation process is performed as a preliminary step before etching back the dielectric fin structure. This pre-treatment eliminates seams in the dielectric material, ensuring that when the structure is later etched back for processing accessibility, the seams cannot cause bridging between epitaxial structures.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conventional deposition methods are used for dielectric fill material, then the structure can be formed, but seams create cut gate failures

Engineering Contradiction:
Improvestructure formationVSAvoidgate integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The implantation process is applied as a preliminary treatment to the dielectric fill material after deposition but before subsequent processing steps. This eliminates seams that would otherwise cause cut gate failures, maintaining gate integrity while preserving the ease of structure formation through conventional deposition methods.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in seam-free or substantially seam-free dielectric fin structures with improved etch resistance, reducing device defects, preventing bridging, and minimizing cut gate failures.

Implementation Method 1

performing an implantation process on the dielectric fin structure. The implantation process breaks bonds within in the dielectric fin structure and causes re-bonding within the dielectric fin structure

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20250126822A1Semiconductor Device and Method
Publication Date: 2025.04.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250126822A1 patent drawing
  • US20250126822A1 patent drawing
  • US20250126822A1 patent drawing

AI summary

Semiconductor devices including fin-shaped isolation structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a fin extending from a semiconductor substrate; a shallow trench isolation (STI) region over the semiconductor substrate adjacent the fin; and a dielectric fin structure over the STI region, the dielectric fin structure extending in a direction parallel to the fin, the dielectric fin structure including a first liner layer in contact with the STI region; and a first fill material over the first liner layer, the first fill material including a seam disposed in a lower portion of the first fill material and separated from a top surface of the first fill material, a first carbon concentration in the lower portion of the first fill material being greater than a second carbon concentration in an upper portion of the first fill material.