Dielectric Frame Gate Isolation for Semiconductor LDE Mitigation

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Solution Overview

Problem

The continuous scaling down of semiconductor device dimensions and increasing demand for performance lead to challenges such as substrate deformation, lay-out dependent effects (LDE), increased leakage current, damage to source/drain epitaxial structures, and threshold voltage shifts in nanostructure transistors.

Innovation Solution

The formation of a dielectric frame structure using a stiff dielectric material with a Young's modulus greater than silicon oxide, extending along the channel structure and acting as gate isolation, reduces substrate deformation and minimizes the LDE effect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional semiconductor device scaling is continued, then device density and integration are improved, but substrate deformation and lay-out dependent effects increase

Engineering Contradiction:
Improvedevice densityVSAvoidsubstrate deformation
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The gate structure is segmented into multiple isolated portions by introducing dielectric frame structures between adjacent gates. This segmentation prevents stress coupling between neighboring gates, reducing lay-out dependent effects and substrate deformation while maintaining high device density through compact arrangement of the segmented gates

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dielectric frame structures are introduced as intermediary elements between adjacent gate structures. These dielectric frames act as stress isolation barriers, preventing stress transfer between neighboring gates and minimizing substrate deformation, thereby improving manufacturing precision without sacrificing device integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If continuous scaling is pursued, then processing complexity increases, but device performance and reliability deteriorate due to leakage current and threshold voltage shifts

Engineering Contradiction:
Improveprocessing complexityVSAvoiddevice performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Dielectric frame structures are formed between gate structures during the fabrication process before final device operation. This preliminary action of stress isolation during manufacturing prevents the development of lay-out dependent effects, leakage current, and threshold voltage shifts that would otherwise compromise device reliability, while the standard fabrication processes maintain acceptable processing complexity

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If gate structures are placed closer together to increase density, then device integration is improved, but lay-out dependent effects and stress coupling increase

Engineering Contradiction:
Improvedevice integration densityVSAvoidlay-out dependent effects
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

Adjacent gate structures are segmented into isolated portions by dielectric frame structures positioned between them. This segmentation enables closer gate placement for higher integration density while the dielectric frames prevent stress coupling and lay-out dependent effects by electrically and mechanically isolating each gate portion from its neighbors

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dielectric frame structure effectively reduces device leakage current, minimizes damage to source/drain epitaxial structures, and reduces threshold voltage shifts in semiconductor devices.

Implementation Method 1

forming a dielectric frame structure with a stiff dielectric material having a Young's modulus greater than silicon oxide

Methodology Applied
Scientific EffectYoung's modulus: Elasticity

Data Source

PatentUS20250203964A1Dielectric Frame Structures to Mitigate Lay-Out-Dependent Effect in Semiconductor Devices
Publication Date: 2025.06.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250203964A1 patent drawing
  • US20250203964A1 patent drawing
  • US20250203964A1 patent drawing

AI summary

The present disclosure describes a semiconductor device having a dielectric frame structure. The semiconductor device includes a channel structure on a substrate and extending along a first direction, a gate structure on the channel structure and extending along a second direction different from the first direction, a dielectric frame structure on the substrate and parallel to the channel structure, and an isolation structure adjacent to the gate structure and extending through the channel structure into the substrate. The dielectric frame structure includes a dielectric material extending through the gate structure to separate the gate structure into two portions. An end portion of the isolation structure is in contact with the dielectric frame structure.