Dielectric Gap Filling With Silicon-Rich Layer for Void Control
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in forming high-quality dielectric layers with reduced oxidation and the need for high-temperature annealing processes, which affect integration density and production costs.
Innovation Solution
A dielectric gap-filling process involving a precursor soak layer and ultraviolet/oxygen treatment followed by thermal treatment is used to form dielectric layers with improved film quality near seam regions, reducing oxidation and avoiding lengthy annealing processes, thereby enhancing wafer-per-hour yield and reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric gap-filling processes are used, then dielectric layers can be formed, but oxidation occurs and high-temperature annealing is required, affecting integration density and production costs
Solution Approach 1:
A silicon-rich layer is deposited before the dielectric layer to prevent oxidation during subsequent processing steps. This preliminary protective layer is formed as part of the gap-filling process, eliminating the need for separate oxidation prevention steps and high-temperature annealing, thus improving dielectric layer quality while simplifying the overall process
Solution Approach 2:
The process changes the chemical composition parameters by incorporating a silicon-rich layer with specific silicon precursor flow rates and cycle numbers. This parameter modification creates a protective interface that prevents oxidation without requiring high-temperature annealing, resolving the contradiction between reliability and process complexity
2Manufacturing precision
If high-temperature annealing processes are used to improve dielectric layer quality, then film quality improves, but wafer-per-hour yield decreases and production costs increase
Solution Approach 1:
The silicon-rich layer is formed in advance during the gap-filling deposition process, creating oxidation protection before any potential oxidation can occur. This eliminates the need for subsequent high-temperature annealing steps, maintaining dielectric layer quality while avoiding productivity losses from lengthy thermal processing
Solution Approach 2:
The invention extracts and eliminates the high-temperature annealing step from the conventional process sequence. By incorporating oxidation prevention into the deposition phase itself, the separate annealing operation is made unnecessary, thereby improving wafer-per-hour yield while maintaining manufacturing precision
3Productivity
If feature sizes are reduced to increase integration density, then more components can be integrated, but oxidation and void formation in dielectric layers increase
Solution Approach 1:
The silicon-rich layer is deposited conformally to provide localized oxidation protection at the critical interface regions between the trench floor and sidewalls. This local quality enhancement prevents oxidation and void formation in the most vulnerable areas, enabling reliable dielectric filling even as feature sizes are reduced to increase integration density
Solution Approach 2:
The protective silicon-rich layer is formed before dielectric deposition, establishing oxidation protection in advance. This preliminary action ensures that even in scaled-down features where oxidation risks are higher, the dielectric layer quality is maintained, allowing continued increases in integration density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process results in improved dielectric layer quality, reduced void formation, and increased integration density without the need for high-temperature annealing, leading to cost-effective and efficient semiconductor device manufacturing.
Implementation Method 1
forming a silicon-rich layer over the liner layer, where forming the silicon-rich layer includes: flowing a first silicon precursor into a process chamber for a first time interval; and flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second time interval
Implementation Method 2
performing an ultraviolet/oxygen treatment on the first dielectric layer
Implementation Method 3
after preforming the ultraviolet/oxygen treatment, performing a thermal treatment on the first dielectric layer
Data Source
AI summary
A semiconductor device and a method of forming the same are provided. The method includes forming a trench in a substrate. A liner layer is formed along sidewalls and a bottom of the trench. A silicon-rich layer is formed over the liner layer. Forming the silicon-rich layer includes flowing a first silicon precursor into a process chamber for a first time interval, and flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second time interval. The second time interval is different from the first time interval. The method further includes forming a dielectric layer over the silicon-rich layer.