Dielectric Isolated Fin Structures for FinFET Devices
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Solution Overview
Problem
Existing FinFET technologies face challenges in isolating fins from the substrate, leading to leakage currents, particularly when using silicon-germanium (SiGe) materials, and existing methods like BOTS and SON are either incompatible with SiGe or present mechanical and fill conformity issues.
Innovation Solution
A method involving epitaxial growth of SiGe and silicon layers, patterning, and thermal oxidation to form fins with dielectric isolation, where the silicon nitride layer acts as a barrier, allowing for uniform fin dimensions and effective insulation from the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If BOTS (bottom oxidation through STIs) is used to isolate fins from substrate, then leakage current is reduced, but the process produces scalloped interface shape and is incompatible with SiGe fins
Solution Approach 1:
The patent introduces an intermediary material layer (silicon nitride or other dielectric) between the fin and substrate that serves as an oxygen barrier during thermal oxidation. This intermediary layer allows the process to work with SiGe fins by preventing unwanted oxidation at the fin-substrate interface, while still achieving effective electrical isolation. The intermediary layer is selectively removed or remains as part of the final structure, resolving the contradiction between isolation effectiveness and SiGe compatibility.
2Reliability
If SON (silicon on nothing) is used to isolate fins, then electrical isolation is achieved, but mechanical stability issues arise and complete fill cannot be assured
Solution Approach 1:
The patent performs preliminary actions by forming the dielectric isolation layer and oxide barrier layer before completing the fin structure. This allows the isolation mechanism to be established early, providing electrical isolation without requiring complete fill of the space beneath the fin. The preliminary formation of these layers prevents leakage currents while maintaining mechanical stability, as the layers are integrated into the overall structure rather than requiring full encapsulation.
3Reliability
If thermal oxidation is performed to convert silicon to thermal oxide for isolation, then effective insulation is achieved, but uniform fin dimensions are compromised due to scalloped interface
Solution Approach 1:
The patent uses an intermediary oxygen barrier layer (such as silicon nitride) deposited conformally over the fin structure before thermal oxidation. This intermediary layer protects the fin sidewalls and top surface from oxidation, ensuring uniform fin dimensions are maintained. Meanwhile, the barrier layer allows controlled oxidation to occur at the fin-substrate interface to create the necessary electrical isolation, thus resolving the contradiction between insulation effectiveness and dimension uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides improved isolation of fins from the substrate, reducing leakage currents, is compatible with SiGe structures, and maintains control over oxidation, suitable for aggressively scaled CMOS fabrication, enhancing transistor performance.
Implementation Method 1
performing a thermal oxidation to convert the second region to a material insulating the first region formed of the third material from the substrate formed of the first material
Data Source
AI summary
On a substrate formed of a first semiconductor material, a first overlying layer formed of a second semiconductor material is deposited. A second overlying layer formed of a third semiconductor material is deposited over the first overlying layer. The first and second overlying layers are patterned to define fins, wherein each fin includes a first region formed of the third material over a second region formed of the second material. An oxide material fills the space between the fins. A thermal oxidation is then performed to convert the second region to a material insulating the first region formed of the third material from the substrate. As an optional step, the second region formed of the second material is horizontally thinned before the oxide material is deposited and the thermal oxidation is performed. Once the fins are formed and insulated from the substrate, conventional FinFET fabrication is performed.