Dielectrically Isolated Semiconductor Device Using Selective Oxidation
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Solution Overview
Problem
The high cost and complexity of manufacturing dielectrically isolated semiconductor devices using silicon on insulator (SOI) wafers, which require expensive high-temperature bonding processes, make it desirable to develop a simpler and cost-effective method.
Innovation Solution
A dielectrically isolated semiconductor device is manufactured using a semiconductor substrate with a first and second semiconductor layer, where a first dielectric isolation layer surrounds a semiconductor island, formed by converting porous silicon into silicon oxide, eliminating the need for an SOI wafer and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SOI wafer bonding process is used to form dielectrically isolated semiconductor devices, then device performance is improved through complete isolation, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The isolation structure is segmented into two portions: a first portion extending along the bottom of the semiconductor island and a second portion extending along the sidewalls. This segmentation allows each portion to be formed from different semiconductor layers through selective oxidation, achieving complete isolation without requiring complex SOI wafer bonding processes.
Solution Approach 2:
The invention uses a simple semiconductor substrate with multiple semiconductor layers instead of expensive pre-formed SOI wafers. The isolation structure is formed through selective oxidation of these layers, eliminating the need for high-temperature bonding processes and reducing manufacturing cost significantly.
2Reliability
If SOI wafer bonding process is used, then complete dielectric isolation is achieved, but manufacturing cost increases
Solution Approach 1:
The invention changes the approach from physical bonding of pre-formed layers to chemical oxidation of semiconductor layers in situ. By controlling oxidation parameters selectively on different layers, complete dielectric isolation is achieved through a simpler, more cost-effective process that eliminates high-temperature bonding requirements.
3Reliability
If conventional trench isolation with interlayer dielectric is used, then isolation is achieved, but parasitic capacitance remains high
Solution Approach 1:
The isolation structure provides different isolation qualities at different locations: the first portion along the bottom and the second portion along the sidewalls. This localized quality enhancement ensures complete isolation around the semiconductor island, minimizing parasitic capacitance more effectively than conventional uniform trench isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and decreases parasitic capacitance, enabling high-speed applications without the need for pre-formed SOI wafers.
Implementation Method 1
converting porous silicon into silicon oxide
Data Source
AI summary
The present disclosure relates to a dielectrically isolated semiconductor device and a method for manufacturing the same. The dielectrically isolated semiconductor device includes a semiconductor substrate, a first semiconductor layer above the semiconductor substrate, a second semiconductor layer above the first semiconductor layer, a semiconductor island in the second semiconductor layer, and a first dielectric isolation layer surrounding a bottom and sidewalls of the semiconductor island. The first dielectric isolation layer includes a first portion which is formed from a portion of the first semiconductor layer and extending along the bottom of the semiconductor island, and a second portion which is formed from a portion of the second semiconductor layer and extending along the sidewalls of the semiconductor island. The dielectrically isolated semiconductor devices needs no an SOI wafer and reduces manufacturing cost.