Dielectric Isolation Spacer for 3D Memory Backside Contact
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in effectively isolating backside contact via structures from electrically conductive layers, leading to potential short circuits and reduced reliability.
Innovation Solution
A dielectric isolation spacer is introduced, laterally surrounding the backside contact via structure and extending from the substrate to below the topmost electrically conductive layer, preventing direct contact and ensuring electrical isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If backside contact via structures are formed to extend through the alternating stack, then electrical connection to the substrate is achieved, but short circuits between the backside contact via structures and electrically conductive layers may occur
Solution Approach 1:
An insulating spacer is introduced as an intermediary element between the backside contact via structure and the electrically conductive layers. This spacer extends laterally from the sidewall of the backside contact via structure and vertically from the substrate to below the topmost electrically conductive layer, preventing direct contact and potential short circuits while maintaining electrical connection functionality.
Solution Approach 2:
The isolation structure is segmented into two distinct parts: an insulating spacer that provides primary isolation from the substrate to below the topmost conductive layer, and a dielectric isolation spacer that provides additional isolation for the upper portion. This segmentation allows each component to address specific isolation requirements at different vertical levels.
2Reliability
If isolation structures are added to prevent short circuits, then reliability is improved, but device complexity increases
Solution Approach 1:
The insulating spacer and dielectric isolation spacer are merged to form a continuous isolation structure around the backside contact via structure. This combined approach provides comprehensive electrical isolation throughout the entire vertical extent of the conductive layers, improving reliability while managing complexity through functional integration.
Solution Approach 2:
Different materials and structures are used at different vertical levels: the insulating spacer extends from the substrate to below the topmost electrically conductive layer, while the dielectric isolation spacer specifically addresses the upper portion isolation requirement. This local differentiation optimizes isolation effectiveness at each level.
Data Source
AI summary
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures extending through the alternating stack are formed. A backside trench is formed through the alternating stack. The sacrificial material layers are replaced with electrically conductive layers. An insulating spacer and the backside contact via structure are formed within the backside trench. A dielectric isolation trench is formed by removing a peripheral portion of an upper region of the backside contact via structure and an upper portion of the insulating spacer. A dielectric isolation spacer is formed in the dielectric isolation trench to prevent an electrical short between an upper portion of the backside contact via structure and the electrically conductive layers.