Dielectric Lattice with Trench Capacitor and Shield Structures
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Solution Overview
Problem
High-voltage power MOSFETs experience signal ringing due to non-linear output capacitance and parasitic inductance, which existing passive components like snubbing capacitors and resistors fail to effectively mitigate, especially when integrated, as they introduce additional parasitic inductance and reliability issues with thick dielectric films.
Innovation Solution
The implementation of trench-based passive devices and shield structures within a dielectric lattice in the termination region of power semiconductor devices, utilizing a three-dimensional dielectric lattice with air gaps and thin dielectric films to reduce parasitic inductance and enhance breakdown voltage, while consuming less semiconductor area and avoiding the reliability issues of thick oxide films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If external passive components (resistors and snubbing capacitors) are used to reduce signal ringing, then signal ringing is reduced, but additional parasitic inductance is introduced which decreases effectiveness
Solution Approach 1:
The patent combines passive components (resistors and capacitors) and shield structures into an integrated termination region within the semiconductor device, merging multiple functions into a unified structure that reduces parasitic inductance while maintaining signal ringing suppression effectiveness
Solution Approach 2:
The patent transitions from two-dimensional planar layouts to three-dimensional vertical structures by implementing trenches extending into the semiconductor substrate, allowing passive components and shields to be stacked vertically and reducing lateral parasitic inductance paths
2Strength
If thick dielectric films are used for integrated capacitors to handle high operating voltages, then breakdown voltage is improved, but production difficulty and cost increase, and reliability issues arise due to film stresses
Solution Approach 1:
The patent segments the dielectric structure into multiple thin films stacked vertically within trenches, replacing a single thick dielectric film with multiple thinner layers that reduce internal stresses while maintaining the required breakdown voltage through cumulative thickness
Solution Approach 2:
The patent employs composite dielectric structures combining multiple material layers with different mechanical and electrical properties, creating a multi-layered system that balances electrical insulation requirements with mechanical stress management
3Strength
If thick dielectric films are used for integrated capacitors, then breakdown voltage is improved, but production cost and manufacturing difficulty increase
Solution Approach 1:
The patent divides the dielectric structure into multiple thin films that can be deposited using standard semiconductor manufacturing processes, avoiding the need for specialized thick-film deposition equipment and reducing manufacturing complexity
Solution Approach 2:
The patent utilizes vertical stacking of thin dielectric films within trenches to achieve the required breakdown voltage without increasing lateral footprint, enabling high-voltage operation while maintaining compatibility with standard planar fabrication processes
4Device complexity
If integrated passive components are implemented, then external components are eliminated, but parasitic inductance is introduced reducing effectiveness
Solution Approach 1:
The patent implements vertical stacking of passive components and shields within trenches, transforming lateral current paths into vertical paths that reduce parasitic inductance while maintaining integration benefits
Solution Approach 2:
The patent introduces conductive shield structures as intermediary elements between active regions and passive components, creating controlled electromagnetic field paths that minimize parasitic inductance while enabling integrated component implementation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces signal ringing without adding significant parasitic inductance, improves breakdown voltage, and reduces production costs and reliability issues associated with thick dielectric films, enabling efficient and scalable integration of passive components in power semiconductor devices.
Implementation Method 1
cavity separating the trench from the semiconductor region... reduce parasitic inductance
Implementation Method 2
thin dielectric films to reduce parasitic inductance and enhance breakdown voltage... avoiding the reliability issues of thick oxide films
Data Source
AI summary
In a general aspect, a semiconductor device can include a semiconductor region, an active region disposed in the semiconductor region, and a termination region disposed on the semiconductor region and adjacent to the active region. The termination region can include a trench having a conductive material disposed therein. The termination region can further include a first cavity separating the trench from the semiconductor region. A portion of the first cavity can be disposed between a bottom of the trench and the semiconductor region. The termination region can also include a second cavity separating the trench from the semiconductor region.


