Dielectric Blocking Layer for Fine-Pitch Solder Bridge Prevention
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Solution Overview
Problem
The reduction in metal bump pitches during the packaging process of integrated circuits leads to increased likelihood of solder bridging between neighboring bumps, posing a challenge in maintaining reliable connections.
Innovation Solution
A photo-sensitive polymer is coated over the metal bumps and surface dielectric layers, exposed to light to form recesses, which house the solder regions, preventing them from bridging to neighboring solder regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the pitch of metal bumps is reduced to increase integration density, then the area occupied by bumps decreases, but the likelihood of solder bridging between neighboring bumps increases
Solution Approach 1:
The patent applies segmentation by introducing a dielectric blocking layer that divides and isolates each solder region into separate compartments. This layer segments the solder flow paths, preventing adjacent solder regions from merging into bridges, thereby enabling reduced bump pitch while maintaining reliability through physical separation of solder zones.
Solution Approach 2:
The dielectric blocking layer serves as an intermediary barrier between adjacent metal bumps and solder regions. This intermediate structure actively prevents direct contact between neighboring solder regions during the bonding process, allowing closer bump spacing without increasing bridging risk.
2Productivity
If the pitch of metal bumps is reduced to improve packaging density, then more bumps can be accommodated on the wafer, but the manufacturing precision required to prevent solder bridging increases
Solution Approach 1:
The dielectric blocking layer is formed in advance before the soldering process, pre-establishing physical barriers that define and constrain solder region boundaries. This preliminary structuring eliminates the need for high-precision control during subsequent soldering operations, as the blocking layer inherently prevents bridging regardless of minor variations in solder placement accuracy.
Solution Approach 2:
The invention changes the structural parameter of the packaging interface by introducing a dielectric layer with specific blocking properties. This parameter change transforms the system from one requiring high precision solder placement to one where the dielectric structure itself enforces separation, thereby reducing the manufacturing precision burden while maintaining high packaging density.
3Reliability
If a dielectric blocking layer is introduced to prevent solder bridging, then solder region isolation is improved, but the device structure becomes more complex
Solution Approach 1:
The dielectric blocking layer performs multiple functions simultaneously: it provides electrical isolation between adjacent metal bumps, physically confines solder regions to prevent bridging, and serves as a structural template for defining bump pitch. This multi-functionality achieves improved solder isolation without proportionally increasing complexity, as a single layer accomplishes multiple protective and organizational roles.
Solution Approach 2:
The patent merges the functions of electrical isolation and mechanical confinement into a single dielectric blocking layer structure. By combining these functions in one element rather than using separate isolation and confinement structures, the overall device complexity is minimized while achieving reliable solder region separation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The recesses effectively prevent solder bridging, allowing for smaller pitch solder connections without the risk of electrical shorts, enhancing the reliability and efficiency of the packaging process.
Implementation Method 1
A photo-sensitive polymer is coated over the metal bumps and surface dielectric layers, exposed to light to form recesses
Data Source
AI summary
A method includes forming a first package component, which comprises forming a first dielectric layer having a first top surface, and forming a first conductive feature. The first conductive feature includes a via embedded in the first dielectric layer, and a metal bump having a second top surface higher than the first top surface of the first dielectric layer. The method further includes dispensing a photo-sensitive layer, with the photo-sensitive layer covering the metal bump, and performing a photolithography process to form a recess in the photo-sensitive layer. The metal bump is exposed to the recess, and the photo-sensitive layer has a third top surface higher than the metal bump. A second package component is bonded to the first package component, and a solder region extends into the recess to bond the metal bump to a second conductive feature in the second package component.