Semiconductor Package Dielectric Layer Structure for Uniform Die Thinning
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving uniform thickness of semiconductor dies due to large total thickness variation (TTV) in dielectric layers, which can lead to device failure and reduced production yield, especially in integrated fan-out (InFO) package technology.
Innovation Solution
A method involving the formation of a first dielectric layer with a high shrinkage ratio, followed by a second dielectric layer with a low shrinkage ratio, to achieve a substantially flat upper surface, allowing for even thinning and reducing TTV, thereby preventing device failure and improving production yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single dielectric layer with high shrinkage ratio is used, then the packaging technology enables fan-out packages with increased I/O pads, but the total thickness variation (TTV) becomes large causing non-uniform die thickness
Solution Approach 1:
The patent divides the single dielectric layer into multiple dielectric layers with different shrinkage ratios. The first dielectric layer has a first shrinkage ratio and the second dielectric layer has a second shrinkage ratio that is different from the first. This segmentation allows each layer to contribute differently to the overall structure, enabling both fan-out capability and thickness uniformity.
Solution Approach 2:
The patent applies different material properties to different layers - the first dielectric layer is designed with specific shrinkage characteristics while the second dielectric layer has different shrinkage characteristics. This local differentiation of material properties allows the structure to achieve both high adaptability for fan-out packaging and precise thickness control.
2Productivity
If dielectric layers with large TTV are used, then the packaging structure provides high functional density, but device failure occurs due to non-uniform thinning
Solution Approach 1:
By segmenting the dielectric structure into multiple layers with controlled shrinkage ratios, the patent prevents the large TTV that would otherwise occur with a single layer. This ensures uniform thinning during manufacturing while maintaining the high functional density required for productivity.
Solution Approach 2:
The patent performs preliminary shrinkage control during the dielectric layer formation process itself, rather than attempting to correct TTV issues later. By designing the layered structure with predetermined shrinkage ratios, the uniformity is built-in before the thinning process, preventing device failure.
3Manufacturing precision
If back grinding tape is used to correct TTV, then die thickness uniformity is improved, but manufacturing cost increases
Solution Approach 1:
The patent performs the thickness uniformity correction in advance during the dielectric layer formation process, rather than requiring costly post-processing with back grinding tape. By designing the layered dielectric structure to inherently achieve uniform thickness, the need for expensive corrective manufacturing steps is eliminated.
Solution Approach 2:
The patent changes the shrinkage ratio parameter of the dielectric layers to achieve the desired thickness uniformity. By selecting appropriate shrinkage ratios for each layer, the structure self-corrects for thickness variations, eliminating the need for additional manufacturing steps and reducing costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces TTV, ensuring uniform die thickness and preventing electrical connection issues, thereby enhancing production yield and eliminating the need for expensive back grinding tape, thus reducing manufacturing costs.
Implementation Method 1
the first dielectric layer has a first shrinkage ratio that is larger than a second shrinkage ratio of the second dielectric layer
Data Source
AI summary
A method of forming a semiconductor device includes forming a first dielectric layer over a front side of a wafer, the wafer having a plurality of dies at the front side of the wafer, the first dielectric layer having a first shrinkage ratio smaller than a first pre-determined threshold; curing the first dielectric layer at a first temperature, where after curing the first dielectric layer, a first distance between a highest point of an upper surface of the first dielectric layer and a lowest point of the upper surface of the first dielectric layer is smaller than a second pre-determined threshold; thinning the wafer from a backside of the wafer; and performing a dicing process to separate the plurality of dies into individual dies.


